Le 01/07/2016 13:35, Stefan Hauser a écrit :
> When initializing the PHY control register, the FIFO depth bits are
> written without reading the previous register value, i.e. all other
> bits are overwritten with zero. This disables automatic MDI-X
> configuration, which is enabled by default. Fix initialization by doing
> a read/modify/write operation.
>
> Signed-off-by: Stefan Hauser <ste...@shauser.net>
Reviewed-by: Florian Fainelli <f.faine...@gmail.com>
Fixes: 2a10154abcb7 ("net: phy: dp83867: Add TI dp83867 phy")
--
Florian
