diff -Naru linux-2.6.16_orig/drivers/net/netxen/netxen_nic_init.c
linux-2.6.16/drivers/net/netxen/netxen_nic_init.c
--- linux-2.6.16_orig/drivers/net/netxen/netxen_nic_init.c 1969-12-31
16:00:00.000000000 -0800
+++ linux-2.6.16/drivers/net/netxen/netxen_nic_init.c 2006-03-24
14:13:57.000000000 -0800
@@ -0,0 +1,718 @@
+/*
+ * Copyright (C) 2003 - 2006 NetXen Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
+ * MA 02111-1307, USA.
+ *
+ * The full GNU General Public License is included in this distribution
+ * in the file called LICENSE.
+ *
+ * Contact Information:
+ * [EMAIL PROTECTED]
+ * NetXen, 3965 Freedom Circle, Fourth Floor,
+ * Santa Clara, CA 95054
+ */
+/*
+ * Source file for NIC routines to initialize the Phantom Hardware
+ *
+ * $Id: netxen_nic_init.c,v 1.26.6.9 2006/03/11 12:09:37 pradeep Exp $
+ *
+ */
+#include <linux/netdevice.h>
+#include <linux/delay.h>
+#include "netxen_nic.h"
+#include "netxen_nic_hw.h"
+#include "nic_cmn.h"
+#include "netxen_nic_ioctl.h"
+
+struct crb_addr_pair {
+ long addr;
+ long data;
+};
+
+#define MAX_CRB_XFORM 60
+static unsigned int crb_addr_xform[MAX_CRB_XFORM];
+#define ADDR_ERROR ((unsigned long ) 0xffffffff )
+
+#define crb_addr_transform(name) \
+ crb_addr_xform[NetXen_HW_PX_MAP_CRB_##name] = \
+ NetXen_HW_CRB_HUB_AGT_ADR_##name << 20
+static void
+crb_addr_transform_setup(void)
+{
+ crb_addr_transform(XDMA);
+ crb_addr_transform(TIMR);
+ crb_addr_transform(SRE);
+ crb_addr_transform(SQN3);
+ crb_addr_transform(SQN2);
+ crb_addr_transform(SQN1);
+ crb_addr_transform(SQN0);
+ crb_addr_transform(SQS3);
+ crb_addr_transform(SQS2);
+ crb_addr_transform(SQS1);
+ crb_addr_transform(SQS0);
+ crb_addr_transform(RPMX7);
+ crb_addr_transform(RPMX6);
+ crb_addr_transform(RPMX5);
+ crb_addr_transform(RPMX4);
+ crb_addr_transform(RPMX3);
+ crb_addr_transform(RPMX2);
+ crb_addr_transform(RPMX1);
+ crb_addr_transform(RPMX0);
+ crb_addr_transform(ROMUSB);
+ crb_addr_transform(SN);
+ crb_addr_transform(QMN);
+ crb_addr_transform(QMS);
+ crb_addr_transform(PGNI);
+ crb_addr_transform(PGND);
+ crb_addr_transform(PGN3);
+ crb_addr_transform(PGN2);
+ crb_addr_transform(PGN1);
+ crb_addr_transform(PGN0);
+ crb_addr_transform(PGSI);
+ crb_addr_transform(PGSD);
+ crb_addr_transform(PGS3);
+ crb_addr_transform(PGS2);
+ crb_addr_transform(PGS1);
+ crb_addr_transform(PGS0);
+ crb_addr_transform(PS);
+ crb_addr_transform(PH);
+ crb_addr_transform(NIU);
+ crb_addr_transform(I2Q);
+ crb_addr_transform(EG);
+ crb_addr_transform(MN);
+ crb_addr_transform(MS);
+ crb_addr_transform(CAS2);
+ crb_addr_transform(CAS1);
+ crb_addr_transform(CAS0);
+ crb_addr_transform(CAM);
+ crb_addr_transform(C2C1);
+ crb_addr_transform(C2C0);
+}
+
+/*
+ * decode_crb_addr(0 - utility to translate from internal Phantom CRB address
+ * to external PCI CRB address.
+ */
+unsigned long
+decode_crb_addr (unsigned long addr)
+{
+ int i;
+ unsigned long base_addr, offset, pci_base;
+
+ crb_addr_transform_setup();
+
+ pci_base = ADDR_ERROR;
+ base_addr = addr & 0xfff00000;
+ offset = addr & 0x000fffff;
+
+ for (i=0; i< MAX_CRB_XFORM; i++) {
+ if (crb_addr_xform[i] == base_addr) {
+ pci_base = i << 20;
+ break;
+ }
+ }
+ if (pci_base == ADDR_ERROR) {
+ return pci_base;
+ } else {
+ return (pci_base + offset);
+ }
+}
+
+static long rom_max_timeout= 10000;
+
+int
+wait_rom_done (netxen_adapter *adapter)
+{
+ long timeout=0;
+ long done=0 ;
+
+ /*DPRINTK(1,INFO,"WAIT ROM DONE \n");*/
+ /*printk(KERN_INFO "WAIT ROM DONE \n");*/
+
+ while (done == 0) {
+ done = netxen_nic_reg_read(adapter, NetXen_ROMUSB_GLB_STATUS);
+ done &=2;
+ timeout++;
+ if (timeout >= rom_max_timeout) {
+ /* printk( "Timeout reached waiting for rom done");*/
+ return -1;
+ }
+ }
+ return 0;
+}
+
+int
+rom_fast_read (netxen_adapter *adapter, int addr)
+{
+ int val;
+
+ /*DPRINTK(1,INFO,"ROM FAST READ \n");*/
+ netxen_nic_reg_write(adapter, NetXen_ROMUSB_ROM_ADDRESS, addr);
+ netxen_nic_reg_write(adapter, NetXen_ROMUSB_ROM_ABYTE_CNT, 3);
+ udelay(100); /* prevent bursting on CRB */
+ netxen_nic_reg_write(adapter, NetXen_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
+ netxen_nic_reg_write(adapter, NetXen_ROMUSB_ROM_INSTR_OPCODE, 0xb);
+ if (wait_rom_done(adapter)) {
+ /* printk("Error waiting for rom done\n"); */
+ return -1;
+ }
+ //reset abyte_cnt and dummy_byte_cnt
+ netxen_nic_reg_write(adapter, NetXen_ROMUSB_ROM_ABYTE_CNT, 0);
+ udelay(100); /* prevent bursting on CRB */
+ netxen_nic_reg_write(adapter, NetXen_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
+
+ val = netxen_nic_reg_read(adapter, NetXen_ROMUSB_ROM_RDATA);
+ return val;
+}
+
+
+/* Error codes */
+#define FPGA_NO_ERROR 0
+#define FPGA_FILE_ERROR 1
+#define FPGA_ILLEGAL_PARAMETER 2
+#define FPGA_MEMORY_ERROR 3
+
+/* macros */
+#ifdef VIRTEX
+#define RESET_STATE changeState(adapter,1,32)
+#else
+#define RESET_STATE changeState(adapter,1,5)
+#endif
+
+#define GO_TO_RTI RESET_STATE;\
+ changeState(adapter,0,1)
+
+/*
+ * TCLK = GPIO0 = 0x60
+ * TRST = GPIO1 = 0x64
+ * TMS = GPIO4 = 0x70
+ * TDO = GPIO5 = 0xc
+ * TDI = GPIO8 = 0x80
+ *
+ */
+#define TCLK (NetXen_CRB_ROMUSB + 0x60)
+#define TRST (NetXen_CRB_ROMUSB + 0x64)
+#define TMS (NetXen_CRB_ROMUSB + 0x70)
+#define TDI (NetXen_CRB_ROMUSB + 0x80)
+#define TDO (NetXen_CRB_ROMUSB + 0xc)
+
+#define TDO_SHIFT 5
+
+#define ASSERT_TRST \
+ do { \
+ netxen_nic_reg_write(adapter, TRST, 2);\
+ netxen_nic_reg_write(adapter, TMS, 2); \
+ netxen_nic_reg_write(adapter, TDI, 2); \
+ netxen_nic_reg_write(adapter, TCLK, 2);\
+ netxen_nic_reg_write(adapter, TRST, 3);\
+ } while (0)
+
+#define CLOCK_IN_BIT(tdi,tms) \
+ do { \
+ netxen_nic_reg_write(adapter, TRST, 3); \
+ netxen_nic_reg_write(adapter, TMS, 2 | (tms)); \
+ netxen_nic_reg_write(adapter, TDI, 2 | (tdi)); \
+ netxen_nic_reg_write(adapter, TCLK, 2); \
+ netxen_nic_reg_write(adapter, TCLK, 3); \
+ netxen_nic_reg_write(adapter, TCLK, 2);\
+ } while (0)
+
+#define CLOCK_OUT_BIT(bit,tms) \
+ do { \
+ netxen_nic_reg_write(adapter, TRST, 3); \
+ netxen_nic_reg_write(adapter, TMS, 2 | (tms)); \
+ netxen_nic_reg_write(adapter, TDI, 2); \
+ netxen_nic_reg_write(adapter, TCLK, 2); \
+ netxen_nic_reg_write(adapter, TCLK, 3); \
+ netxen_nic_reg_write(adapter, TCLK, 2); \
+ (bit) = (netxen_nic_reg_read(adapter, TDO) >> TDO_SHIFT) & 1; \
+ } while (0)
+
+/* boundary scan instructions */
+#define CMD_EXTEST 0x0
+#define CMD_CAPTURE 0x1
+#define CMD_IDCODE 0x2
+#define CMD_SAMPLE 0x3
+
+//Memory BIST
+#define CMD_MBSEL 0x4
+#define CMD_MBRES 0x5
+
+//Logic BIST
+#define CMD_LBSEL 0x6
+#define CMD_LBRES 0x7
+#define CMD_LBRUN 0x18
+
+//Memory Interface
+#define CMD_MEM_WDAT 0x8
+#define CMD_MEM_ACTL 0x9
+#define CMD_MEM_READ 0xa
+
+//Memory Interface
+#define CMD_CRB_WDAT 0xb
+#define CMD_CRB_ACTL 0xc
+#define CMD_CRB_READ 0xd
+
+#define CMD_TRISTATE 0xe
+#define CMD_CLAMP 0xf
+
+#define CMD_STATUS 0x10
+#define CMD_XG_SCAN 0x11
+#define CMD_BYPASS 0x1f
+
+#ifdef VIRTEX
+#define CMD_LENGTH_BITS 6
+#else
+#define CMD_LENGTH_BITS 5
+#endif
+
+
+/* This is the TDI bit that will be clocked out for don't care value */
+#define TDI_DONT_CARE 0
+
+#define TMS_LOW 0
+#define TMS_HIGH 1
+
+#define ID_REGISTER_SIZE_BITS 32
+
+#define EXIT_IR 1
+#define NO_EXIT_IR 0
+
+#define TAP_DELAY()
+
+__inline__ void
+changeState(netxen_adapter *adapter,int tms,int tck)
+{
+ int i;
+ DPRINTK(1, INFO, "changing state tms: %d tck: %d\n", tms, tck);
+ for (i = 0; i< tck; i++)
+ {
+ CLOCK_IN_BIT(TDI_DONT_CARE,tms);
+ }
+}
+
+// Assumes we are in RTI, will return to RTI
+__inline__ int
+loadInstr(netxen_adapter *adapter,int instr,int exit_ir)
+{
+ int i,j;
+
+ DPRINTK(1, INFO, "in loaderinstr instr: %d exit_ir %d\n", instr,
+ exit_ir);
+
+ // go to Select-IR
+ changeState(adapter,1,2);
+
+ // go to Shift-IR
+ changeState(adapter,0,2);
+
+#ifdef VIRTEX
+ for (i = 0; i< (CMD_LENGTH_BITS * 7); i++)
+ {
+ CLOCK_IN_BIT(1,TMS_LOW);
+ }
+#endif
+ for (i = 0; i< (CMD_LENGTH_BITS-1); i++)
+ {
+ j= (instr>>i) & 1;
+ CLOCK_IN_BIT(j,TMS_LOW);
+ }
+
+ /* clock out last bit, and transition to next state */
+ j= (instr >> (CMD_LENGTH_BITS-1)) & 1;
+ // last bit, exit into Exit1-IR
+ CLOCK_IN_BIT(j,1);
+ // go to Update-IR
+ changeState(adapter,1,1);
+ // go to RTI
+ changeState(adapter,0,1);
+ return FPGA_NO_ERROR;
+}
+
+int
+getData(netxen_adapter *adapter,u32 *data,int len, int more)
+{
+ u32 temp=0;
+ int i, bit;
+ DPRINTK(1, INFO, "doing getData data: %p len: %d more: %d\n",
+ data, len,more);
+ // go to Select-DR-Scan
+ changeState(adapter,1,1);
+ // go to shift-DR
+ changeState(adapter,0,1);
+#ifdef VIRTEX
+ // dummy reads
+ for (i=0; i< 6; i++) {
+ CLOCK_OUT_BIT(bit,0);
+ }
+#endif
+ for (i=0; i< (len); i++) {
+ CLOCK_OUT_BIT(bit,0);
+ temp |= (bit << i);
+ }
+ if (!more) {
+ // go to Exit1-DR
+ changeState(adapter,1,1);
+ // go to Update DR
+ changeState(adapter,1,1);
+ // go to RTI
+ changeState(adapter,0,1);
+ }
+
+ *data = temp;
+
+ return 0;
+}
+
+
+int
+get_status(netxen_adapter *adapter)
+{
+ int status;
+
+ DPRINTK(1, INFO, "doing get_status: %p\n", adapter);
+ // tap_inst_wr(INST_STATUS)
+ loadInstr(adapter,CMD_STATUS,EXIT_IR);
+ getData(adapter,&status,1,0);
+ //printf("Status: 0x%02x\n",status);
+ return status;
+}
+// assumes start in RTI, will return to RTI unless more is set
+int
+getData64(netxen_adapter *adapter,u64 *data,int len, int more)
+{
+ u64 temp=0;
+ u64 i, bit;
+ DPRINTK(1, INFO, "getData64 data %p, len %d more %d\n",
+ data, len, more);
+ // go to Select-DR-Scan
+ changeState(adapter,1,1);
+ // go to shift-DR
+ changeState(adapter,0,1);
+#ifdef VIRTEX
+ // dummy reads
+ for (i=0; i< 6; i++) {
+ CLOCK_OUT_BIT(bit,0);
+ }
+#endif
+ for (i=0; i< (len); i++) {
+ CLOCK_OUT_BIT(bit,0);
+ temp |= (bit << i);
+ }
+
+ if (!more) {
+ // go to Exit1-DR
+ changeState(adapter,1,1);
+ // go to Update DR
+ changeState(adapter,1,1);
+ // go to RTI
+ changeState(adapter,0,1);
+ }
+
+ //temp |= (bit << (len - 1));
+ //printf("Data read: 0x%016llx\n",temp);
+ *data = temp;
+ return 0;
+}
+
+// assumes start in shift_DR, will return to RTI unless more is set
+int
+loadData (netxen_adapter *adapter,u64 data, int len, int more)
+{
+ int i, bit;
+
+ DPRINTK(1, INFO, "loading data %llx data %d more %d\n",
+ data, len, more);
+ for (i=0; i< (len-1); i++) {
+ bit = (data >> i) & 1;
+ CLOCK_IN_BIT(bit,0);
+ }
+ if (more) {
+ bit = (data >> (len-1)) & 1;
+ CLOCK_IN_BIT(bit,0);
+ } else {
+ bit = (data>>(len - 1)) & 1;
+ // last data, go to Exit1-DR
+ CLOCK_IN_BIT(bit,1);
+ // go to Update DR
+ changeState(adapter,1,1);
+ // go to RTI
+ changeState(adapter,0,1);
+ }
+
+ return 0;
+}
+
+#define CRB_REG_EX_PC 0x3c
+
+int pinit_from_rom(netxen_adapter *adapter, int verbose)
+{
+ int addr, val,status;
+ int n, i;
+ struct crb_addr_pair *buf;
+ unsigned long off;
+ unsigned long flags;
+
+
+ struct crb_addr_pair {
+ long addr;
+ long data;
+ };
+
+ // resetall
+ status = netxen_nic_get_board_info(adapter);
+ if (status)
+ printk ("%s: pinit_from_rom: Error getting board
info\n",netxen_nic_driver_name);
+
+ NetXen_CRB_WRITELIT_ADAPTER(NetXen_ROMUSB_GLB_SW_RESET, 0xffffffff,
adapter);
+
+ if (verbose) {
+ printk("P2 ROM board type: 0x%08x\n",rom_fast_read(adapter,
+ 0x4008));
+ printk("P2 ROM board num: 0x%08x\n",rom_fast_read(adapter,
+ 0x400c));
+ printk("P2 ROM chip num: 0x%08x\n",rom_fast_read(adapter,
+ 0x4010));
+ }
+
+ n = rom_fast_read(adapter, 0);
+ if (n & 0x800000000ULL) {
+ n &= ~0x80000000ULL;
+ if (n < 1024) {
+ if (verbose) printk("%s: %d CRB init values found"
+ " in
ROM.\n",netxen_nic_driver_name, n);
+ } else {
+ printk("%s:n=0x%x Error! NetXen card flash not"
+ " initialized.\n", __FUNCTION__, n);
+ return -1;
+ }
+ buf = kmalloc(n*sizeof(struct crb_addr_pair), GFP_KERNEL);
+ if (buf==NULL) {
+ printk("%s: pinit_from_rom: Unable to malloc
memory.\n",
+ netxen_nic_driver_name);
+ return -1;
+ }
+ for (i=0; i< n; i++) {
+ val = rom_fast_read(adapter, 8*i + 4);
+ addr = rom_fast_read(adapter, 8*i + 8);
+ buf[i].addr=addr;
+ buf[i].data=val;
+
+ if (verbose)
+ printk("%s: PCI: 0x%08x == 0x%08x\n",
+ netxen_nic_driver_name,
+ (unsigned int)decode_crb_addr(
+ (unsigned long)addr),
+ val);
+ }
+ for (i=0; i< n; i++) {
+ /*netxen_crb_writelit(decode_crb_addr((unsigned long)
+ buf[i].addr) +
+ NetXen_PCI_CRBSPACE,
buf[i].data);*/
+
+ off = decode_crb_addr((unsigned long)buf[i].addr) +
NetXen_PCI_CRBSPACE;
+ if (ADDR_IN_WINDOW1(off))
+ {
+ read_lock(&adapter->adapter_lock);
+ NetXen_NIC_PCI_WRITE_32(buf[i].data,
CRB_NORMALIZE(adapter, off));
+ read_unlock(&adapter->adapter_lock);
+ }
+ else
+ {
+ write_lock_irqsave(&adapter->adapter_lock,
flags);
+ //_netxen_nic_write_crb(adapter, off,
buf[i].data);
+ netxen_nic_pci_change_crbwindow(adapter, 0);
+ off = adapter->ahw.pci_base + off;
+ NetXen_NIC_PCI_WRITE_32(buf[i].data, (void
*)off);
+ netxen_nic_pci_change_crbwindow(adapter, 1);
+
write_unlock_irqrestore(&adapter->adapter_lock, flags);
+ }
+
+ msleep(1);
+ }
+ kfree(buf);
+
+ // disable_peg_cache_all
+ // unreset_net_cache
+ val = NetXen_CRB_READ_VAL_ADAPTER(NetXen_ROMUSB_GLB_SW_RESET,
adapter);
+ NetXen_CRB_WRITELIT_ADAPTER(NetXen_ROMUSB_GLB_SW_RESET, (val &
0xffffff0f),adapter);
+ // p2dn replyCount
+ NetXen_CRB_WRITELIT_ADAPTER(NetXen_CRB_PEG_NET_D+0xec,
0x1e,adapter);
+ // disable_peg_cache 0
+
NetXen_CRB_WRITELIT_ADAPTER(NetXen_CRB_PEG_NET_D+0x4c,8,adapter);
+ // disable_peg_cache 1
+
NetXen_CRB_WRITELIT_ADAPTER(NetXen_CRB_PEG_NET_I+0x4c,8,adapter);
+
+ // peg_clr_all
+ // peg_clr 0
+
NetXen_CRB_WRITELIT_ADAPTER(NetXen_CRB_PEG_NET_0+0x8,0,adapter);
+
NetXen_CRB_WRITELIT_ADAPTER(NetXen_CRB_PEG_NET_0+0xc,0,adapter);
+ // peg_clr 1
+
NetXen_CRB_WRITELIT_ADAPTER(NetXen_CRB_PEG_NET_1+0x8,0,adapter);
+
NetXen_CRB_WRITELIT_ADAPTER(NetXen_CRB_PEG_NET_1+0xc,0,adapter);
+ // peg_clr 2
+
NetXen_CRB_WRITELIT_ADAPTER(NetXen_CRB_PEG_NET_2+0x8,0,adapter);
+
NetXen_CRB_WRITELIT_ADAPTER(NetXen_CRB_PEG_NET_2+0xc,0,adapter);
+ // peg_clr 3
+
NetXen_CRB_WRITELIT_ADAPTER(NetXen_CRB_PEG_NET_3+0x8,0,adapter);
+
NetXen_CRB_WRITELIT_ADAPTER(NetXen_CRB_PEG_NET_3+0xc,0,adapter);
+
+ }
+ return 0;
+}
+
+int load_crbinit_from_rom(netxen_adapter *adapter, int verbose)
+{
+ int addr, val,status;
+ int n, i;
+ struct crb_addr_pair *buf;
+ unsigned long off;
+ unsigned long flags;
+
+ struct crb_addr_pair {
+ long addr;
+ long data;
+ };
+
+ // resetall
+ status = netxen_nic_get_board_info(adapter);
+ if (status)
+ printk ("%s: load_crbinit_from_rom: Error getting board
info\n",
+ netxen_nic_driver_name);
+
+
+ if (verbose) {
+ printk("P2 ROM board type: 0x%08x\n",rom_fast_read(adapter,
+ 0x4008));
+ printk("P2 ROM board num: 0x%08x\n",rom_fast_read(adapter,
+ 0x400c));
+ printk("P2 ROM chip num: 0x%08x\n",rom_fast_read(adapter,
+ 0x4010));
+ }
+ n = rom_fast_read(adapter, 0);
+ if (n & 0x800000000ULL) {
+ n &= ~0x80000000ULL;
+ if (n < 1024) {
+ if (verbose)
+ printk("%d CRB init values found in ROM.\n",
+ n);
+ } else {
+ printk("%s:n=0x%x Error! NetXen card flash not"
+ " initialized.\n", __FUNCTION__, n);
+ return -1;
+ }
+ buf = kmalloc(n*sizeof(struct crb_addr_pair), GFP_KERNEL);
+ if (buf==NULL) {
+ printk("load_crbinit_from_rom: Unable to malloc"
+ " memory.\n");
+ return -1;
+ }
+ for (i=0; i< n; i++) {
+ val = rom_fast_read(adapter, 8*i + 4);
+ addr = rom_fast_read(adapter, 8*i + 8);
+ buf[i].addr=addr;
+ buf[i].data=val;
+
+ if (verbose)
+ printk("PCI: 0x%08x == 0x%08x\n",
+ (unsigned int)decode_crb_addr(
+ (unsigned long)addr),
+ val);
+ }
+ for (i=0; i< n; i++) {
+ /*netxen_crb_writelit(decode_crb_addr((unsigned long)
+ buf[i].addr) +
+ NetXen_PCI_CRBSPACE,
buf[i].data);*/
+ off = decode_crb_addr((unsigned long)buf[i].addr) +
NetXen_PCI_CRBSPACE;
+ if (ADDR_IN_WINDOW1(off))
+ {
+ read_lock(&adapter->adapter_lock);
+ NetXen_NIC_PCI_WRITE_32(buf[i].data,
CRB_NORMALIZE(adapter, off));
+ read_unlock(&adapter->adapter_lock);
+ }
+ else
+ {
+ write_lock_irqsave(&adapter->adapter_lock,
flags);
+ netxen_nic_pci_change_crbwindow(adapter, 0);
+ off = adapter->ahw.pci_base + off;
+ NetXen_NIC_PCI_WRITE_32(buf[i].data, (void
*)off);
+ netxen_nic_pci_change_crbwindow(adapter, 1);
+
write_unlock_irqrestore(&adapter->adapter_lock, flags);
+ }
+
+ msleep(1);
+ }
+ kfree(buf);
+
+ }
+ return 0;
+}
+
+#define CACHE_DISABLE 1
+#define CACHE_ENABLE 0
+
+void
+phantom_init(struct netxen_adapter_s *adapter)
+{
+ long data = 0;
+
+ msleep(200);
+ if (netxen_crb_read_adapter(NetXen_ROMUSB_GLB_SW_RESET,&data, adapter)) {
+ printk("netxen_init_module: netxen_crb_read failed, using deaddead\n");
+ data = 0xdeaddead;
+ }
+ //netxen_crb_writelit(NetXen_ROMUSB_GLB_SW_RESET, data & 0xfffffffe);
+ read_lock(&adapter->adapter_lock);
+ NetXen_NIC_PCI_WRITE_32(data & 0xfffffffe, CRB_NORMALIZE(adapter,
+ NetXen_ROMUSB_GLB_SW_RESET));
+ read_unlock(&adapter->adapter_lock);
+
+ return;
+}
+
+#define FLASH_BASE (0x8000)
+#define PHANTOM_MEM_BASE (0x8000)
+
+void
+load_firmware(struct netxen_adapter_s *adapter)
+{
+ int i;
+ long data, size = 0;
+ long flashaddr = FLASH_BASE, memaddr = PHANTOM_MEM_BASE;
+
+ size = (12*1024)/4;
+ //netxen_crb_writelit(NetXen_ROMUSB_GLB_CAS_RST, 1);
+ read_lock(&adapter->adapter_lock);
+ NetXen_NIC_PCI_WRITE_32(1, CRB_NORMALIZE(adapter,
+ NetXen_ROMUSB_GLB_CAS_RST));
+ read_unlock(&adapter->adapter_lock);
+
+ for (i = 0; i < size; i++) {
+ data = rom_fast_read(adapter, flashaddr);
+ netxen_nic_pci_mem_write(adapter, memaddr, &data, 4);
+ flashaddr += 4;
+ memaddr += 4;
+ }
+ udelay(100);
+ //netxen_crb_writelit(NetXen_ROMUSB_GLB_CAS_RST, 0);
+ read_lock(&adapter->adapter_lock);
+ NetXen_NIC_PCI_WRITE_32(0, CRB_NORMALIZE(adapter,
+ NetXen_ROMUSB_GLB_CAS_RST));
+ read_unlock(&adapter->adapter_lock);
+
+ udelay(10000);
+}
--- linux-2.6.16_orig/drivers/net/Kconfig 2006-03-24 14:58:19.000000000
-0800
+++ linux-2.6.16/drivers/net/Kconfig 2006-03-24 15:02:02.000000000 -0800
@@ -2313,6 +2313,12 @@
If in doubt, say N.
+config NetXen_NIC
+ tristate "NetXen Gigabit Ethernet"
+ help
+ This enables the support for NetXen's 1G / 10G
+ Ethernet card.
+
endmenu
if !UML
diff -Naru linux-2.6.16_orig/drivers/net/Makefile
linux-2.6.16/drivers/net/Makefile
--- linux-2.6.16_orig/drivers/net/Makefile 2006-03-19 21:53:29.000000000
-0800
+++ linux-2.6.16/drivers/net/Makefile 2006-03-24 08:06:47.000000000 -0800
@@ -12,6 +12,7 @@
obj-$(CONFIG_CHELSIO_T1) += chelsio/
obj-$(CONFIG_BONDING) += bonding/
obj-$(CONFIG_GIANFAR) += gianfar_driver.o
+obj-$(CONFIG_NetXen_NIC) += netxen/
gianfar_driver-objs := gianfar.o \
gianfar_ethtool.o \
diff -Naru linux-2.6.16_orig/drivers/net/netxen/Makefile
linux-2.6.16/drivers/net/netxen/Makefile
--- linux-2.6.16_orig/drivers/net/netxen/Makefile 1969-12-31
16:00:00.000000000 -0800
+++ linux-2.6.16/drivers/net/netxen/Makefile 2006-03-24 14:25:53.000000000
-0800
@@ -0,0 +1,40 @@
+# Copyright (C) 2003 - 2006 NetXen Inc.
+# All rights reserved.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston,
+# MA 02111-1307, USA.
+#
+# The full GNU General Public License is included in this distribution
+# in the file called LICENSE.
+#
+# Contact Information:
+# [EMAIL PROTECTED]
+# NetXen, 3965 Freedom Circle, Fourth Floor,
+# Santa Clara, CA 95054
+#
+# Makefile for the NetXen NIC Driver
+#
+
+BUILD_PLATFORM=$(shell uname -p)
+
+CFLAGS += -DP2
+
+ifeq ($(BUILD_PLATFORM),x86_64)
+ CFLAGS += -mcmodel=kernel -mno-red-zone -fno-unit-at-a-time
-fno-reorder-blocks
+endif
+
+obj-$(CONFIG_NetXen_NIC) += netxen_nic.o
+
+netxen_nic-objs := netxen_nic_hw.o netxen_nic_main.o netxen_nic_ethtool.o
niu.o netxen_nic_init.o netxen_nic_isr.o xge_mdio.o
diff -Naru linux-2.6.16_orig/drivers/net/netxen/README
linux-2.6.16/drivers/net/netxen/README
--- linux-2.6.16_orig/drivers/net/netxen/README 1969-12-31 16:00:00.000000000
-0800
+++ linux-2.6.16/drivers/net/netxen/README 2006-03-24 14:10:24.000000000
-0800
@@ -0,0 +1,10 @@
+This contains the source file for the NetXen Linux driver. It is released
+under the GPL license. This is released without any warrany. See the
+GPL notice in the individual files for more details.
+
+
+To build the driver, do the following:
+
+1. untar the archive.
+2. cd /lib/modules/$(uname -r)/build (or wherever your kernel tree is)
+3. make SUBDIRS=dir-path-to-netxen-driver modules
-
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