(Sorry, resent due to wrong message in CC, sending again to keep consistency)

I have been having problems for some while with sky2 on my machine even
with sky2 0.15 (as in 2.6.16-rc3-git4)

But, i found a patch from Stephen that noone seemed to have commented
on, so i thought i'd better try it out and it seems to be working, so
far at least.

I have been running this test for about 5h and i have generated:
RX bytes:291753800069 (278238.1 Mb)  TX bytes:302637265450 (288617.3 Mb)
(ping -f -s8000 between 2 gigabit connected machines (both directions))

Which exceeds 30mb/s =) and all without a single problem. 

My application of this patch is currently broken since one of the
sections failed. (so one part can't actually error out)

Could someone do a updated version? fix the pci_bus* things?

This is on a AMD64 x2, some basic  information listed below... I'm
actually to tired to think of something more to add, so just flame me
instead =)

some information:
           CPU0       CPU1
  0:      48884    4744796    IO-APIC-edge  timer
...
225:   92432413          0         PCI-MSI  sky2
...

lspci -vvvv
02:00.0 Ethernet controller: Marvell Technology Group Ltd. 88E8053 PCI-E 
Gigabit Ethernet Controller (rev 15)
        Subsystem: Micro-Star International Co., Ltd. Marvell 88E8053 Gigabit 
Ethernet Controller (MSI)
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- 
Stepping- SERR- FastB2B-
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- 
<MAbort- >SERR- <PERR-
        Latency: 0, Cache Line Size 08
        Interrupt: pin A routed to IRQ 225
        Region 0: Memory at fddfc000 (64-bit, non-prefetchable) [size=16K]
        Region 2: I/O ports at ce00 [size=256]
        [virtual] Expansion ROM at fdc00000 [disabled] [size=128K]
        Capabilities: [48] Power Management version 2
                Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA 
PME(D0+,D1+,D2+,D3hot+,D3cold+)
                Status: D0 PME-Enable- DSel=0 DScale=1 PME-
        Capabilities: [50] Vital Product Data
        Capabilities: [5c] Message Signalled Interrupts: 64bit+ Queue=0/1 
Enable+
                Address: 00000000fee00000  Data: 40e1
        Capabilities: [e0] Express Legacy Endpoint IRQ 0
                Device: Supported: MaxPayload 128 bytes, PhantFunc 0, ExtTag-
                Device: Latency L0s unlimited, L1 unlimited
                Device: AtnBtn- AtnInd- PwrInd-
                Device: Errors: Correctable- Non-Fatal- Fatal- Unsupported-
                Device: RlxdOrd- ExtTag- PhantFunc- AuxPwr+ NoSnoop-
                Device: MaxPayload 128 bytes, MaxReadReq 512 bytes
                Link: Supported Speed 2.5Gb/s, Width x1, ASPM L0s, Port 3
                Link: Latency L0s <256ns, L1 unlimited
                Link: ASPM Disabled RCB 128 bytes CommClk- ExtSynch-
                Link: Speed 2.5Gb/s, Width x1
        Capabilities: [100] Advanced Error Reporting


-- 
Ian Kumlien <pomac () vapor ! com> -- http://pomac.netswarm.net
For all those people suffering with pci express errors
on the sky2 driver.  The problem is the PCI subsystem sometimes
won't let the sky2 driver write to PCI express registers. It depends
on the phase of the moon (actually ACPI) and number of devices.

Anyway, this should fix it. Please tell me if it solves it for you.


--- sky2-2.6.orig/drivers/net/sky2.c
+++ sky2-2.6/drivers/net/sky2.c
@@ -2003,19 +2003,16 @@ static void sky2_hw_intr(struct sky2_hw 
 
 	if (status & Y2_IS_PCI_EXP) {
 		/* PCI-Express uncorrectable Error occurred */
-		u32 pex_err;
-
-		pci_read_config_dword(hw->pdev, PEX_UNC_ERR_STAT, &pex_err);
+		u32 pex_err = sky2_read32(hw, PCI_C(PEX_UNC_ERR_STAT));
 
 		if (net_ratelimit())
 			printk(KERN_ERR PFX "%s: pci express error (0x%x)\n",
 			       pci_name(hw->pdev), pex_err);
 
 		/* clear the interrupt */
-		sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
-		pci_write_config_dword(hw->pdev, PEX_UNC_ERR_STAT,
-				       0xffffffffUL);
-		sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
+		sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
+		sky2_write32(hw, PCI_C(PEX_UNC_ERR_STAT), 0xffffffffUL);
+		sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
 
 		if (pex_err & PEX_FATAL_ERRORS) {
 			u32 hwmsk = sky2_read32(hw, B0_HWE_IMSK);
@@ -2181,12 +2178,8 @@ static int sky2_reset(struct sky2_hw *hw
 	sky2_write8(hw, B0_CTST, CS_MRST_CLR);
 
 	/* clear any PEX errors */
-	if (is_pciex(hw)) {
-		u16 lstat;
-		pci_write_config_dword(hw->pdev, PEX_UNC_ERR_STAT,
-				       0xffffffffUL);
-		pci_read_config_word(hw->pdev, PEX_LNK_STAT, &lstat);
-	}
+	if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP))
+		sky2_write32(hw, PCI_C(PEX_UNC_ERR_STAT), 0xffffffffUL);
 
 	pmd_type = sky2_read8(hw, B2_PMD_TYP);
 	hw->copper = !(pmd_type == 'L' || pmd_type == 'S');
--- sky2-2.6.orig/drivers/net/sky2.h
+++ sky2-2.6/drivers/net/sky2.h
@@ -183,6 +183,12 @@ enum csr_regs {
 	Y2_CFG_SPC	= 0x1c00,
 };
 
+/* Workaround for ACPI limitations in pci support.
+ * Sometimes it is impossible to access registers > 256 with
+ * pci_{read/write}_config_dword
+ */
+#define PCI_C(reg)	(Y2_CFG_SPC + reg)
+
 /*	B0_CTST			16 bit	Control/Status register */
 enum {
 	Y2_VMAIN_AVAIL	= 1<<17,/* VMAIN available (YUKON-2 only) */

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