Ivo van Doorn <[EMAIL PROTECTED]> :
> Cleanup channel initialization and remove device specific
> value magic calculations. Just deliver a plain list of values.
> Read the EEPROM for default TXpower values for each channel.
>
> Signed-off-by Ivo van Doorn <[EMAIL PROTECTED]>
>
> diff -U 3 -H -w -E -d -r -N --
> wireless-2.6/drivers/net/wireless/rt2x00/rt2400pci.c
> wireless-2.6-rt2x00/drivers/net/wireless/rt2x00/rt2400pci.c
> --- wireless-2.6/drivers/net/wireless/rt2x00/rt2400pci.c 2006-02-09
> 20:35:21.000000000 +0100
> +++ wireless-2.6-rt2x00/drivers/net/wireless/rt2x00/rt2400pci.c
> 2006-02-11 22:56:08.000000000 +0100
[...]
> @@ -1962,133 +1922,175 @@
> struct ieee80211_channel *channels)
> {
> int counter = 0;
> - int channel = 0;
> + u16 eeprom = 0;
> + u32 rf2_base = 0;
>
> /*
> - * We can put the initialization of channels 1-13
> - * in a loop, channel 14 needs to be initialized
> - * seperately.
> + * Channel initialization.
> + * First we set the basic variables.
> */
> - if(rt2x00_rf(&rt2x00pci->chip, RF2522)){
> for(counter = 0; counter < 13; counter++){
> channels[counter].chan = counter + 1;
> - channels[counter].freq = 2407
> - + ((counter + 1) * 5);
> - channels[counter].val = cpu_to_le32(0x000c1fda
> - + (counter * 0x14));
> - channels[counter].flag =
> - IEEE80211_CHAN_W_ACTIVE_SCAN
> - | IEEE80211_CHAN_W_SCAN
> - | IEEE80211_CHAN_W_IBSS;
> + channels[counter].freq = 2407 + ((counter + 1) * 5);
> + channels[counter].flag = IEEE80211_CHAN_W_IBSS
> + | IEEE80211_CHAN_W_ACTIVE_SCAN | IEEE80211_CHAN_W_SCAN;
> + channels[counter].antenna_max = 0xff;
> }
>
> channels[13].chan = 14;
> channels[13].freq = 2484;
> + channels[13].flag = IEEE80211_CHAN_W_IBSS
> + | IEEE80211_CHAN_W_ACTIVE_SCAN | IEEE80211_CHAN_W_SCAN;
> + channels[13].antenna_max = 0xff;
> +
> + if(rt2x00_rf(&rt2x00pci->chip, RF5222)){
> + for(counter = 14; counter < 37; counter++){
> + if(counter < 22)
> + channels[counter].chan = 36;
> + else if(counter < 33)
> + channels[counter].chan = 100;
> + else
> + channels[counter].chan = 149;
> + channels[counter].chan += ((counter - 14) * 4);
> + channels[counter].freq = ((counter - 13) + 1000) * 5;
> + channels[counter].flag = IEEE80211_CHAN_W_IBSS
> + | IEEE80211_CHAN_W_ACTIVE_SCAN
> + | IEEE80211_CHAN_W_SCAN;
> + channels[counter].power_level = 0x18;
> + channels[counter].antenna_max = 0xff;
> + }
> + }
> +
> + /*
> + * Set device specific value.
> + */
> + if(rt2x00_rf(&rt2x00pci->chip, RF2525)
> + || rt2x00_rf(&rt2x00pci->chip, RF2525E))
> + rf2_base = 0x00080000;
> +
> + if(rt2x00_rf(&rt2x00pci->chip, RF2522)){
> + channels[0].val = cpu_to_le32(0x000c1fda);
> + channels[1].val = cpu_to_le32(0x000c1fee);
> + channels[2].val = cpu_to_le32(0x000c2002);
> + channels[3].val = cpu_to_le32(0x000c2016);
> + channels[4].val = cpu_to_le32(0x000c202a);
> + channels[5].val = cpu_to_le32(0x000c203e);
> + channels[6].val = cpu_to_le32(0x000c2052);
> + channels[7].val = cpu_to_le32(0x000c2066);
> + channels[8].val = cpu_to_le32(0x000c207a);
> + channels[9].val = cpu_to_le32(0x000c208e);
> + channels[10].val = cpu_to_le32(0x000c20a2);
> + channels[11].val = cpu_to_le32(0x000c20b6);
> + channels[12].val = cpu_to_le32(0x000c20ca);
> channels[13].val = cpu_to_le32(0x000c20fa);
> - channels[13].flag = IEEE80211_CHAN_W_SCAN |
> - IEEE80211_CHAN_W_ACTIVE_SCAN | IEEE80211_CHAN_W_IBSS;
> }else if(rt2x00_rf(&rt2x00pci->chip, RF2523)
> || rt2x00_rf(&rt2x00pci->chip, RF2524)
> || rt2x00_rf(&rt2x00pci->chip, RF2525)){
> - for(counter = 0; counter < 13; counter++){
> - channels[counter].chan = counter + 1;
> - channels[counter].freq = 2407
> - + ((counter + 1) * 5);
> - channels[counter].val = cpu_to_le32(0x00000c9e
> - + (counter * 0x04));
> - if(channels[counter].val & 0x00000040)
> - channels[counter].val += 0x00000040;
> - if(rt2x00_rf(&rt2x00pci->chip, RF2525))
> - channels[counter].val += 0x00080000;
> - channels[counter].flag =
> - IEEE80211_CHAN_W_ACTIVE_SCAN
> - | IEEE80211_CHAN_W_SCAN
> - | IEEE80211_CHAN_W_IBSS;
> + channels[0].val = cpu_to_le32(0x00000c9e | rf2_base);
> + channels[1].val = cpu_to_le32(0x00000ca2 | rf2_base);
> + channels[2].val = cpu_to_le32(0x00000ca6 | rf2_base);
> + channels[3].val = cpu_to_le32(0x00000caa | rf2_base);
> + channels[4].val = cpu_to_le32(0x00000cae | rf2_base);
> + channels[5].val = cpu_to_le32(0x00000cb2 | rf2_base);
> + channels[6].val = cpu_to_le32(0x00000cb6 | rf2_base);
> + channels[7].val = cpu_to_le32(0x00000cba | rf2_base);
> + channels[8].val = cpu_to_le32(0x00000cbe | rf2_base);
> + channels[9].val = cpu_to_le32(0x00000d02 | rf2_base);
> + channels[10].val = cpu_to_le32(0x00000d06 | rf2_base);
> + channels[11].val = cpu_to_le32(0x00000d0a | rf2_base);
> + channels[12].val = cpu_to_le32(0x00000d0e | rf2_base);
> + channels[13].val = cpu_to_le32(0x00000d1a | rf2_base);
> + }else if(rt2x00_rf(&rt2x00pci->chip, RF2525E)
> + || rt2x00_rf(&rt2x00pci->chip, RF5222)){
> + channels[0].val = cpu_to_le32(0x00001136 | rf2_base);
> + channels[1].val = cpu_to_le32(0x0000113a | rf2_base);
> + channels[2].val = cpu_to_le32(0x0000113e | rf2_base);
> + channels[3].val = cpu_to_le32(0x00001182 | rf2_base);
> + channels[4].val = cpu_to_le32(0x00001186 | rf2_base);
> + channels[5].val = cpu_to_le32(0x0000118a | rf2_base);
> + channels[6].val = cpu_to_le32(0x0000118e | rf2_base);
> + channels[7].val = cpu_to_le32(0x00001192 | rf2_base);
> + channels[8].val = cpu_to_le32(0x00001196 | rf2_base);
> + channels[9].val = cpu_to_le32(0x0000119a | rf2_base);
> + channels[10].val = cpu_to_le32(0x0000119e | rf2_base);
> + channels[11].val = cpu_to_le32(0x000011a2 | rf2_base);
> + channels[12].val = cpu_to_le32(0x000011a6 | rf2_base);
> + channels[13].val = cpu_to_le32(0x000011ae | rf2_base);
> }
> + if(rt2x00_rf(&rt2x00pci->chip, RF5222)){
> + channels[14].val = cpu_to_le32(0x00018896);
> + channels[15].val = cpu_to_le32(0x0001889a);
> + channels[16].val = cpu_to_le32(0x0001889e);
> + channels[17].val = cpu_to_le32(0x000188a2);
> + channels[18].val = cpu_to_le32(0x000188a6);
> + channels[19].val = cpu_to_le32(0x000188aa);
> + channels[20].val = cpu_to_le32(0x000188ae);
> + channels[21].val = cpu_to_le32(0x000188b2);
>
> - channels[13].chan = 14;
> - channels[13].freq = 2484;
> - channels[13].val = cpu_to_le32(0x00000d1a);
> - channels[13].flag = IEEE80211_CHAN_W_SCAN |
> - IEEE80211_CHAN_W_ACTIVE_SCAN | IEEE80211_CHAN_W_IBSS;
> - }else if(rt2x00_rf(&rt2x00pci->chip, RF2525E)){
> - for(counter = 0; counter < 13; counter++){
> - channels[counter].chan = counter + 1;
> - channels[counter].freq = 2407
> - + ((counter + 1) * 5);
> - channels[counter].val = cpu_to_le32(0x00081136
> - + (counter * 0x04));
> - if(channels[counter].val & 0x00000040)
> - channels[counter].val += 0x00000040;
> - channels[counter].flag =
> - IEEE80211_CHAN_W_ACTIVE_SCAN
> - | IEEE80211_CHAN_W_SCAN
> - | IEEE80211_CHAN_W_IBSS;
> - }
> + channels[22].val = cpu_to_le32(0x00008802);
> + channels[23].val = cpu_to_le32(0x00008806);
> + channels[24].val = cpu_to_le32(0x0000880a);
> + channels[25].val = cpu_to_le32(0x0000880e);
> + channels[26].val = cpu_to_le32(0x00008812);
> + channels[27].val = cpu_to_le32(0x00008816);
> + channels[28].val = cpu_to_le32(0x0000881a);
> + channels[29].val = cpu_to_le32(0x0000881e);
> + channels[30].val = cpu_to_le32(0x00008822);
> + channels[31].val = cpu_to_le32(0x00008826);
> + channels[32].val = cpu_to_le32(0x0000882a);
>
> - channels[13].chan = 14;
> - channels[13].freq = 2484;
> - channels[13].val = cpu_to_le32(0x000811ae);
> - channels[13].flag = IEEE80211_CHAN_W_SCAN |
> - IEEE80211_CHAN_W_ACTIVE_SCAN | IEEE80211_CHAN_W_IBSS;
> - }else if(rt2x00_rf(&rt2x00pci->chip, RF5222)){
> - for(counter = 0; counter < 13; counter++){
> - channels[counter].chan = counter + 1;
> - channels[counter].freq = 2407
> - + ((counter + 1) * 5);
> - channels[counter].val = cpu_to_le32(0x00001136
> - + (counter * 0x04));
> - if(channels[counter].val & 0x00000040)
> - channels[counter].val += 0x00000040;
> - channels[counter].flag =
> - IEEE80211_CHAN_W_ACTIVE_SCAN
> - | IEEE80211_CHAN_W_SCAN
> - | IEEE80211_CHAN_W_IBSS;
> + channels[33].val = cpu_to_le32(0x000090a6);
> + channels[34].val = cpu_to_le32(0x000090ae);
> + channels[35].val = cpu_to_le32(0x000090b6);
> + channels[36].val = cpu_to_le32(0x000090be);
> }
What about something like:
if (rt2x00_rf(&rt2x00pci->chip, RF2522)) {
u32 vals[] = {
0x000c1fda, 0x000c1fee, 0x000c2002, 0x000c2016,
0x000c202a, 0x000c203e, 0x000c2052, 0x000c2066,
0x000c207a, 0x000c208e, 0x000c20a2, 0x000c20b6,
0x000c20ca, 0x000c20fa
};
for (i = 0; i < ARRAY_SIZE(vals); i++)
channels[i].val = cpu_to_le32(vals[i]);
} else if (rt2x00_rf(&rt2x00pci->chip, RF2523) ||
rt2x00_rf(&rt2x00pci->chip, RF2524) ||
rt2x00_rf(&rt2x00pci->chip, RF2525)) {
u32 vals[] = {
0x00000c9e, 0x00000ca2, 0x00000ca6, 0x00000caa,
0x00000cae, 0x00000cb2, 0x00000cb6, 0x00000cba,
0x00000cbe, 0x00000d02, 0x00000d06, 0x00000d0a,
0x00000d0e, 0x00000d1a
};
for (i = 0; i < ARRAY_SIZE(vals); i++)
channels[i].val = cpu_to_le32(vals[i] | rf2_base);
} else if (rt2x00_rf(&rt2x00pci->chip, RF2525E) ||
rt2x00_rf(&rt2x00pci->chip, RF5222)) {
u32 vals[] = {
0x00001136, 0x0000113a, 0x0000113e, 0x00001182,
0x00001186, 0x0000118a, 0x0000118e, 0x00001192,
0x00001196, 0x0000119a, 0x0000119e, 0x000011a2,
0x000011a6, 0x000011ae
};
for (i = 0; i < ARRAY_SIZE(vals); i++)
channels[i].val = cpu_to_le32(vals[i] | rf2_base);
}
if (rt2x00_rf(&rt2x00pci->chip, RF5222)) {
u32 vals[] = {
0x00018896, 0x0001889a, 0x0001889e, 0x000188a2,
0x000188a6, 0x000188aa, 0x000188ae, 0x000188b2,
0x00008802, 0x00008806, 0x0000880a, 0x0000880e,
0x00008812, 0x00008816, 0x0000881a, 0x0000881e,
0x00008822, 0x00008826, 0x0000882a, 0x000090a6,
0x000090ae, 0x000090b6, 0x000090be
};
struct ieee80211_channel *chan = channels + 14;
for (i = 0; i < ARRAY_SIZE(vals); i++)
(chan++)->val = cpu_to_le32(vals[i] | rf2_base);
}
[...]
> +
> + /*
> + * Set device specific, but channel independent RF values.
> + */
> + if(rt2x00_rf(&rt2x00pci->chip, RF2522)){
> + rt2x00pci->rf1 = cpu_to_le32(0x00002050);
> + rt2x00pci->rf3 = cpu_to_le32(0x00000101);
> + rt2x00pci->rf4 = 0;
> + }else if(rt2x00_rf(&rt2x00pci->chip, RF2523)){
> + rt2x00pci->rf1 = cpu_to_le32(0x00022010);
> + rt2x00pci->rf3 = cpu_to_le32(0x000e0111);
> + rt2x00pci->rf4 = cpu_to_le32(0x00000a1b);
> + }else if(rt2x00_rf(&rt2x00pci->chip, RF2524)){
> + rt2x00pci->rf1 = cpu_to_le32(0x00032020);
> + rt2x00pci->rf3 = cpu_to_le32(0x00000101);
> + rt2x00pci->rf4 = cpu_to_le32(0x00000a1b);
> + }else if(rt2x00_rf(&rt2x00pci->chip, RF2525)){
> + rt2x00pci->rf1 = cpu_to_le32(0x00022020);
> + rt2x00pci->rf3 = cpu_to_le32(0x00060111);
> + rt2x00pci->rf4 = cpu_to_le32(0x00000a1b);
> + }else if(rt2x00_rf(&rt2x00pci->chip, RF2525E)){
> + rt2x00pci->rf1 = cpu_to_le32(0x00022020);
> + rt2x00pci->rf3 = cpu_to_le32(0x00060111);
> + rt2x00pci->rf4 = cpu_to_le32(0x00000a0b);
> + }else if(rt2x00_rf(&rt2x00pci->chip, RF5222)){
> + rt2x00pci->rf1 = 0;
> + rt2x00pci->rf3 = cpu_to_le32(0x00000101);
> + rt2x00pci->rf4 = 0;
struct {
unsigned int chip;
u32 val[3];
} rf[] = {
{ RF2522, { 0x00002050, 0x00000101, 0x00000000 } },
{ RF2523, { 0x00022010, 0x000e0111, 0x00000a1b } },
{ RF2524, { 0x00032020, 0x00000101, 0x00000a1b } },
{ RF2525, { 0x00022020, 0x00060111, 0x00000a1b } },
{ RF2525E, { 0x00022020, 0x00060111, 0x00000a0b } },
{ RF5222, { 0x00000000, 0x00000101, 0x00000000 } }
};
for (i = 0; i < ARRAY_SIZE(rf); i++) {
if (rt2x00_rf(&rt2x00pci->chip, rf[i].chip)) {
rt2x00pci->rf1 = cpu_to_le32(rf[i].val[0]);
rt2x00pci->rf3 = cpu_to_le32(rf[i].val[1]);
rt2x00pci->rf4 = cpu_to_le32(rf[i].val[2]);
}
}
--
Ueimor
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