From: "Michael Chan" <[EMAIL PROTECTED]> Date: Mon, 19 Dec 2005 13:02:36 -0800
> The tw32_f() function (register write with immediate read flush) can > hang when used on some registers to switch clock frequencies and > power. A new tw32_wait_f() is added for such registers with the > delay before the read and after the read. And if the PCI write gets posted for "X" usec, we'll still do the PCI read back-to-back with the write it will thus still hang. This change makes the "_f()" part totally pointless. There is nothing to flush out if we're going to use a delay to wait for the write to take effect. By definition the write has been flushed already if it has already taken effect within the device. Yes, this delay works most of the time, but there are legitimate cases where it would not. That isn't to say I won't apply the patch. I'm just pointing out how incredibly silly this is :-) It would be nice if the hardware actually would function correctly in the presence of deeply delayed posted PCI writes, but aparently there are very few chips that do. - To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
