On Wed, Aug 24, 2005 at 07:05:28PM +0000, James Chapman wrote: > I hadn't realized the mdio spin-wait could take 100us on this chip. In > that case it makes sense to use the chip's MII status registers instead. > At the same time, now that Andy Fleming's PHY abstraction code is > available, the MII support should probably be changed over as BenH > suggested. > > This patch series was done 6 months ago and unfortunately I no longer > have access to mv643xx hardware to test with. Can someone help? Perhaps > the switch to Andy's MII abstraction layer could be submitted as a > separate patch on top of this series?
Even previous to this patch, a link-up event does 4 reads of PHY registers, each averaging about 100uS spin delay. This patch adds a couple more reads. I'll take a stab at code to use the PHY Abstraction Layer. At least there, if I understand correctly, the delays can be sleeps rather than spins. Bottom line: the current patch should be dropped for now. -Dale - To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
