On Thu, 7 Jul 2005 [EMAIL PROTECTED] wrote:
> .......
> 2. Removed unnecessary PIOs(read/write of tx_traffic_int and
> rx_traffic_int) from interrupt handler and removed read of
> general_int_status register from xmit routine.
> ......
> @@ -2891,6 +2869,8 @@ int s2io_xmit(struct sk_buff *skb, struc
> val64 = mac_control->fifos[queue].list_info[put_off].list_phy_addr;
> writeq(val64, &tx_fifo->TxDL_Pointer);
>
> + wmb();
> +
> val64 = (TX_FIFO_LAST_TXD_NUM(frg_cnt) | TX_FIFO_FIRST_LIST |
> TX_FIFO_LAST_LIST);
>
> @@ -2900,9 +2880,6 @@ int s2io_xmit(struct sk_buff *skb, struc
> #endif
> writeq(val64, &tx_fifo->List_Control);
>
> - /* Perform a PCI read to flush previous writes */
> - val64 = readq(&bar0->general_int_status);
> -
> put_off++;
I thought that an mmiowb() was called for here (to order the PIO
writes above more cheaply than doing the readq()). I posted a
patch like this some time ago:
http://marc.theaimsgroup.com/?l=linux-netdev&m=111508292028110&w=2
FWIW, I've done quite a few performance measurements with the patch
I posted earlier, and it's worked well. For 1500 byte mtus throughput
goes up by ~20%. Is even the mmiowb() unnecessary?
What is the wmb() above for?
--
Arthur
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