On 28.07.2015 19:05, Marek Olšák wrote: > From: Marek Olšák <marek.ol...@amd.com> > > The patch has a better explanation. Just a summary here: > - The CPU always uploads a whole descriptor array to previously-unused memory. > - CP DMA isn't used. > - No caches need to be flushed. > - All descriptors are always up-to-date in memory even after a hang, because > CP DMA doesn't serve as a middle man to update them. > > This should bring: > - better hang recovery (descriptors are always up-to-date) > - better GPU performance (no KCACHE and TC flushes) > - worse CPU performance for partial updates (only whole arrays are uploaded) > - less used IB space (no CP_DMA and WRITE_DATA packets) > - simpler code > - hopefully, some of the corruption issues with SI cards will go away. > If not, we'll know the issue is not here.
[...] > @@ -24,14 +24,23 @@ > * Marek Olšák <marek.ol...@amd.com> > */ > > -/* Resource binding slots and sampler states (each described with 8 or 4 > dwords) > - * live in memory on SI. > +/* Resource binding slots and sampler states (each described with 8 or > + * 4 dwords) are stored in lists in memory which is accessed by shaders > + * using scalar load instructions. I'd call them arrays instead of lists, but either way: Reviewed-by: Michel Dänzer <michel.daen...@amd.com> -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
