On 01/07/15 01:01, Samuel Pitoiset wrote:
To write data at the right offset, the kernel has to know some
parameters of this ring buffer, like the number of domains and the
maximum number of queries.
Changes since v2:
- only configure the ring buffer if the notifier BO is allocated
- only use one BEGIN_NV04()
Signed-off-by: Samuel Pitoiset <[email protected]>
---
src/gallium/drivers/nouveau/nv50/nv50_screen.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
index ab95d65..335bff1 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
@@ -442,6 +442,16 @@ nv50_screen_init_hwctx(struct nv50_screen *screen)
BEGIN_NV04(push, SUBC_SW(NV01_SUBCHAN_OBJECT), 1);
PUSH_DATA (push, screen->sw->handle);
+ if (screen->query) {
+ /* Do not need to configure the ring buffer used to read back
+ * global performance counters when it is not allocated. */
+ BEGIN_NV04(push, SUBC_SW(0x0190), 1);
+ PUSH_DATA (push, screen->query->handle);
+ BEGIN_NV04(push, SUBC_SW(0x0600), 2);
Shouldn't we have the sw method's handle defined in libdrm?
Anyway, patches 3 and 4 are
Reviewed-by: Martin Peres <[email protected]>
+ PUSH_DATA (push, NV50_HW_PM_RING_BUFFER_MAX_QUERIES);
+ PUSH_DATA (push, NV50_HW_PM_RING_BUFFER_NUM_DOMAINS);
+ }
+
BEGIN_NV04(push, NV50_3D(COND_MODE), 1);
PUSH_DATA (push, NV50_3D_COND_MODE_ALWAYS);
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