On Friday, June 26, 2015 04:15:46 PM Jordan Justen wrote: > On 2015-06-26 15:18:52, Kenneth Graunke wrote: > > According to the "URB SIMD8 Write > Write Data Payload" documentation, > > "The write data payload can be between 1 and 8 message phases long." > > Would a more precise PRM ref location be possible? > > Reviewed-by: Jordan Justen <jordan.l.jus...@intel.com>
That's a good idea. I wrote this before the Broadwell documentation
was released - now that it is, citing the PRM seems appropriate.
It's unfortunately hard to quote these days: the recent documentation
no longer has section numbers, and we effectively can't use page numbers
because they've taken to updating the PDFs randomly without changing any
sort of revision number. They even changed the volume numbers on the
Broadwell docs (when they added the Observability Architecture
information), so even that's not guaranteed...
Here's what I've come up with for v2:
/* If we don't have any valid slots to write, just do a minimal urb write
- * send to terminate the shader. */
+ * send to terminate the shader. This includes 1 slot of undefined data,
+ * because it's invalid to write 0 data:
+ *
+ * From the Broadwell PRM, Volume 7: 3D Media GPGPU, Shared Functions -
+ * Unified Return Buffer (URB) > URB_SIMD8_Write and URB_SIMD8_Read >
+ * Write Data Payload:
+ *
+ * "The write data payload can be between 1 and 8 message phases long."
+ */
Lately, I've taken to just searching for the quoted text in Okular in
order to find it in the documentation. That works pretty well no matter
what set of PRMs you're looking at.
--Ken
>
> > Apparently, the simulator considers it an error if you issue an URB
> > SIMD8 message with only a header and no actual data to write.
> >
> > Signed-off-by: Kenneth Graunke <kenn...@whitecape.org>
> > ---
> > src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 5 ++---
> > 1 file changed, 2 insertions(+), 3 deletions(-)
> >
> > diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> > b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> > index 9a4bad6..7074b5c 100644
> > --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> > +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> > @@ -1800,14 +1800,13 @@ fs_visitor::emit_urb_writes(gl_clip_plane
> > *clip_planes)
> > /* If we don't have any valid slots to write, just do a minimal urb
> > write
> > * send to terminate the shader. */
> > if (vue_map->slots_valid == 0) {
> > -
> > - fs_reg payload = fs_reg(GRF, alloc.allocate(1),
> > BRW_REGISTER_TYPE_UD);
> > + fs_reg payload = fs_reg(GRF, alloc.allocate(2),
> > BRW_REGISTER_TYPE_UD);
> > bld.exec_all().MOV(payload, fs_reg(retype(brw_vec8_grf(1, 0),
> > BRW_REGISTER_TYPE_UD)));
> >
> > fs_inst *inst = bld.emit(SHADER_OPCODE_URB_WRITE_SIMD8, reg_undef,
> > payload);
> > inst->eot = true;
> > - inst->mlen = 1;
> > + inst->mlen = 2;
> > inst->offset = 1;
> > return;
> > }
>
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