This was the only actual difference between Gen4-6 and Gen7+ in terms of
the values we program.  The rest was just mechanical structure
rearrangement.

Signed-off-by: Kenneth Graunke <[email protected]>
---
 src/mesa/drivers/dri/i965/brw_sampler_state.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_sampler_state.c 
b/src/mesa/drivers/dri/i965/brw_sampler_state.c
index ae4694b..d811cf5 100644
--- a/src/mesa/drivers/dri/i965/brw_sampler_state.c
+++ b/src/mesa/drivers/dri/i965/brw_sampler_state.c
@@ -403,9 +403,11 @@ brw_update_sampler_state(struct brw_context *brw,
         intel_translate_shadow_compare_func(sampler->CompareFunc);
    }
 
-   min_lod = U_FIXED(CLAMP(sampler->MinLod, 0, 13), 6);
-   max_lod = U_FIXED(CLAMP(sampler->MaxLod, 0, 13), 6);
-   lod_bias = S_FIXED(CLAMP(texUnit->LodBias + sampler->LodBias, -16, 15), 6);
+   const int lod_bits = brw->gen >= 7 ? 8 : 6;
+   min_lod = U_FIXED(CLAMP(sampler->MinLod, 0, 13), lod_bits);
+   max_lod = U_FIXED(CLAMP(sampler->MaxLod, 0, 13), lod_bits);
+   lod_bias = S_FIXED(CLAMP(texUnit->LodBias + sampler->LodBias, -16, 15),
+                      lod_bits);
    base_level = U_FIXED(0, 1);
 
    uint32_t border_color_offset;
-- 
2.0.2

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