On Thu, May 8, 2014 at 5:45 PM, Kenneth Graunke <kenn...@whitecape.org> wrote: > On 05/08/2014 05:34 PM, Matt Turner wrote: >> On Thu, May 8, 2014 at 4:44 PM, Kenneth Graunke <kenn...@whitecape.org> >> wrote: >>> According to the documentation, we need to set the source 0 register >>> type to IMM for flow control instructions that have both JIP and UIP. >>> >>> Fixes GPU hangs in approximately 10 Piglit tests, 5 es3conform tests, >>> Unigine Crypt, a WebGL raytracer demo, and several Steam titles. >>> >>> Cc: "10.2" <mesa-sta...@lists.freedesktop.org> >>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75478 >>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75878 >>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76939 >>> Signed-off-by: Kenneth Graunke <kenn...@whitecape.org> >>> --- >>> src/mesa/drivers/dri/i965/gen8_generator.cpp | 14 +++++++------- >>> 1 file changed, 7 insertions(+), 7 deletions(-) >>> >>> diff --git a/src/mesa/drivers/dri/i965/gen8_generator.cpp >>> b/src/mesa/drivers/dri/i965/gen8_generator.cpp >>> index dd434a7..faca9c0 100644 >>> --- a/src/mesa/drivers/dri/i965/gen8_generator.cpp >>> +++ b/src/mesa/drivers/dri/i965/gen8_generator.cpp >>> @@ -422,6 +422,7 @@ gen8_generator::IF(unsigned predicate) >>> { >>> gen8_instruction *inst = next_inst(BRW_OPCODE_IF); >>> gen8_set_dst(brw, inst, vec1(retype(brw_null_reg(), >>> BRW_REGISTER_TYPE_D))); >>> + gen8_set_src0(brw, inst, brw_imm_d(0)); >>> gen8_set_exec_size(inst, default_state.exec_size); >>> gen8_set_pred_control(inst, predicate); >>> gen8_set_mask_control(inst, BRW_MASK_ENABLE); >>> @@ -435,6 +436,7 @@ gen8_generator::ELSE() >>> { >>> gen8_instruction *inst = next_inst(BRW_OPCODE_ELSE); >>> gen8_set_dst(brw, inst, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); >>> + gen8_set_src0(brw, inst, brw_imm_d(0)); >>> gen8_set_mask_control(inst, BRW_MASK_ENABLE); >>> push_if_stack(inst); >>> return inst; >>> @@ -456,6 +458,7 @@ gen8_generator::ENDIF() >>> >>> gen8_instruction *endif_inst = next_inst(BRW_OPCODE_ENDIF); >>> gen8_set_mask_control(endif_inst, BRW_MASK_ENABLE); >>> + gen8_set_src0(brw, endif_inst, brw_imm_d(0)); >> >> Else and endif don't have UIP, so they don't need this. >> >> With those hunks removed: >> >> Reviewed-by: Matt Turner <matts...@gmail.com> > > It's probably not necessary, but I figured consistency would be best. > Would it be okay to leave it as is?
I think applying a work around when it's not needed is confusing. But whatever. _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
