All of the other control flow instructions are dependent on the
existence of an IF or WHILE instruction.
---
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 3 +++
src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp | 3 +++
2 files changed, 6 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index ba8d26d..89656d1 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -1318,6 +1318,9 @@ vec4_generator::generate_code(exec_list *instructions,
bool *has_control_flow)
unsigned pre_emit_nr_insn = p->nr_insn;
+ if (inst->opcode == BRW_OPCODE_IF || inst->opcode == BRW_OPCODE_WHILE)
+ *has_control_flow = true;
+
generate_vec4_instruction(inst, dst, src);
if (inst->no_dd_clear || inst->no_dd_check) {
diff --git a/src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp
b/src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp
index 222e81a..42d025e 100644
--- a/src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp
@@ -850,6 +850,9 @@ gen8_vec4_generator::generate_code(exec_list *instructions,
const unsigned pre_emit_nr_inst = nr_inst;
+ if (ir->opcode == BRW_OPCODE_IF || ir->opcode == BRW_OPCODE_WHILE)
+ *has_control_flow = true;
+
generate_vec4_instruction(ir, dst, src);
if (ir->no_dd_clear || ir->no_dd_check) {
--
1.8.3.2
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