From: Michel Dänzer <[email protected]> E.g. the Source engine seems to always write to gl_ClipVertex, but normally doesn't enable any GL_CLIP_DISTANCEn states. This change removes some irrelevant parts from the generated vertex shader code in such cases.
Signed-off-by: Michel Dänzer <[email protected]> --- src/gallium/drivers/radeonsi/radeonsi_shader.c | 10 +++++++++- src/gallium/drivers/radeonsi/radeonsi_shader.h | 1 + src/gallium/drivers/radeonsi/si_state.c | 4 ++++ 3 files changed, 14 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/radeonsi_shader.c b/src/gallium/drivers/radeonsi/radeonsi_shader.c index 6756e65..ddf6416 100644 --- a/src/gallium/drivers/radeonsi/radeonsi_shader.c +++ b/src/gallium/drivers/radeonsi/radeonsi_shader.c @@ -565,6 +565,7 @@ static void si_llvm_emit_clipvertex(struct lp_build_tgsi_context * bld_base, LLVMValueRef (*pos)[9], unsigned index) { struct si_shader_context *si_shader_ctx = si_shader_context(bld_base); + struct si_pipe_shader *shader = si_shader_ctx->shader; struct lp_build_context *base = &bld_base->base; struct lp_build_context *uint = &si_shader_ctx->radeon_bld.soa.bld_base.uint_bld; unsigned reg_index; @@ -583,6 +584,11 @@ static void si_llvm_emit_clipvertex(struct lp_build_tgsi_context * bld_base, for (reg_index = 0; reg_index < 2; reg_index ++) { LLVMValueRef *args = pos[2 + reg_index]; + if (!(shader->key.vs.ucps_enabled & (1 << reg_index))) + continue; + + shader->shader.clip_dist_write |= 0xf << (4 * reg_index); + args[5] = args[6] = args[7] = @@ -708,13 +714,15 @@ handle_semantic: } break; case TGSI_SEMANTIC_CLIPDIST: + if (!(si_shader_ctx->shader->key.vs.ucps_enabled & + (1 << d->Semantic.Index))) + continue; shader->clip_dist_write |= d->Declaration.UsageMask << (d->Semantic.Index << 2); target = V_008DFC_SQ_EXP_POS + 2 + d->Semantic.Index; break; case TGSI_SEMANTIC_CLIPVERTEX: si_llvm_emit_clipvertex(bld_base, pos_args, index); - shader->clip_dist_write = 0xFF; continue; case TGSI_SEMANTIC_FOG: case TGSI_SEMANTIC_GENERIC: diff --git a/src/gallium/drivers/radeonsi/radeonsi_shader.h b/src/gallium/drivers/radeonsi/radeonsi_shader.h index 9c3156d..a70303c 100644 --- a/src/gallium/drivers/radeonsi/radeonsi_shader.h +++ b/src/gallium/drivers/radeonsi/radeonsi_shader.h @@ -127,6 +127,7 @@ union si_shader_key { } ps; struct { unsigned instance_divisors[PIPE_MAX_ATTRIBS]; + unsigned ucps_enabled:2; } vs; }; diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 58e5a56..aca7972 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -2040,6 +2040,10 @@ static INLINE void si_shader_selector_key(struct pipe_context *ctx, for (i = 0; i < rctx->vertex_elements->count; ++i) key->vs.instance_divisors[i] = rctx->vertex_elements->elements[i].instance_divisor; + if (rctx->queued.named.rasterizer->clip_plane_enable & 0xf0) + key->vs.ucps_enabled = 0x3; + else if (rctx->queued.named.rasterizer->clip_plane_enable & 0xf) + key->vs.ucps_enabled = 0x1; } else if (sel->type == PIPE_SHADER_FRAGMENT) { if (sel->fs_write_all) key->ps.nr_cbufs = rctx->framebuffer.nr_cbufs; -- 1.8.4.rc1 _______________________________________________ mesa-dev mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/mesa-dev
