Daniel Vetter <dan...@ffwll.ch> writes:
> On Tue, Apr 02, 2013 at 06:46:32PM -0700, Eric Anholt wrote:
>> This still fails, since 8192*4bpp == 32768, which is too big to use the
>> blitter on.
>>
>> Reviewed-by: Kenneth Graunke <kenn...@whitecape.org>
>> ---
>> src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 21 +++++++++++++++++++++
>> 1 file changed, 21 insertions(+)
>>
>> diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
>> b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
>> index ffdaec5..5e0cd61 100644
>> --- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
>> +++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
>> @@ -1703,6 +1703,23 @@ intel_miptree_map_singlesample(struct intel_context
>> *intel,
>> {
>> struct intel_miptree_map *map;
>>
>> + /* Estimate the size of the mappable aperture into the GTT. There's an
>> + * ioctl to get the whole GTT size, but not one to get the mappable
>> subset.
>> + * It turns out it's basically always 256MB, though some ancient hardware
>> + * was smaller.
>> + */
>
> Gen6+ have an adjustable GTT with sizes 128M, 256M and 512M. At least
> 128M I've seen in the wild. Do we need a new getparam? Iirc the ddx
> cobbles this out of libpciaccess by looking at the size of the relevant
> bar. Also note that on old crap (this seems to be part of the shared intel
> library functions) it can be as little as 64M ;-)Yeah, I'd forgotten that we actually did see 128 post-gen4, and that it was either 64 or 128 on gen2. For the purpose of this code, I'm pretty comfortable with being really conservative to get the bugs fixed, and I'd love to see the getter from the kernel to get the real number later. The 2D driver having to do pciaccess for this is something we need to fix for non-root X some day anyway, right?
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