On Mon, Jul 16, 2012 at 11:43 AM, Jose Fonseca <[email protected]> wrote: > FYI, I've just pushed a branch named llvmpipe-wider-regs, which allows > llvmpipe to leverage SIMD registers wider than 128bits. > > Unfortunately, performance-wise this doesn't change much, as llvmpipe > performance is dominated by integer SIMD instructions, whereas currently the > AVX instruction set currently only supports floating SIMD instructions. > Actually, often things will get slightly slower, as there are considerable > overheads in piecing together the 256 floating point code paths and 128-bit > integer code paths. > > The benefit for this change is foremost architectural: llvmpipe now makes > less assumptions regarding the number of pixels/quads/etc that fit into a > hardware register, a flexibility which will be necessary to get things like > per-pixel LOD working properly. > > This barely touch files outside gallivm/draw/llvmpipe modules. I haven't > tested i915g, r300g, so let me know if there are regressions / concerns. I'd > like to merge this into master soon.
It regresses the following on i915g (and I suspect it will regress on llvmpipe also): draw-vertices pass -> abort draw-vertices-half-float pass -> crash draw-vertices-half-float-user pass -> crash draw-vertices-user pass -> abort The machine in question doesn't have AVX (or llvm 3.1 for that matter). Stéphane _______________________________________________ mesa-dev mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/mesa-dev
