I'm OK with this. Reviewed-by: Marek Olšák <marek.ol...@amd.com>
Marek On Thu, Jun 13, 2019 at 1:39 PM Rob Clark <robdcl...@gmail.com> wrote: > From: Rob Clark <robdcl...@chromium.org> > > This maps to a special format that recent generations of adreno have, > for blitting z24s8. Conceptually it is similar to doing Z and/or S > blits by pretending it is r8g8b8a8 (with appropriate writemask). But > it differs when bandwidth compression is used, as z24 is a different > type from r8g8b8. > > Signed-off-by: Rob Clark <robdcl...@chromium.org> > --- > This is part of: > > https://gitlab.freedesktop.org/mesa/mesa/merge_requests/1088 > > but sending to list to give better visibility. > > src/gallium/auxiliary/util/u_format.csv | 7 +++++++ > src/gallium/drivers/svga/svga_format.c | 1 + > src/gallium/include/pipe/p_format.h | 2 ++ > 3 files changed, 10 insertions(+) > > diff --git a/src/gallium/auxiliary/util/u_format.csv > b/src/gallium/auxiliary/util/u_format.csv > index 51a08bd6530..039b5fa9141 100644 > --- a/src/gallium/auxiliary/util/u_format.csv > +++ b/src/gallium/auxiliary/util/u_format.csv > @@ -144,6 +144,13 @@ PIPE_FORMAT_X8Z24_UNORM , plain, 1, 1, > x8 , un24, , , y___, > PIPE_FORMAT_Z32_FLOAT_S8X24_UINT , plain, 1, 1, f32 , up8 , x24, > , xy__, zs, f32 , x24 , up8, , xz__ > PIPE_FORMAT_X32_S8X24_UINT , plain, 1, 1, x32 , up8 , x24, > , _y__, zs, x32 , x24 , up8, , _z__ > > +# Depth-stencil formats equivalent to blitting > PIPE_FORMAT_Z24_UNORM_S8_UINT > +# as PIPE_FORMAT_R8G8B8A8_*, in that it is an equivalent size to the z/s > +# format. This is mainly for hw that has some sort of bandwidth > compressed > +# format where the compression for z24s8 is not equivalent to r8g8b8a8, > +# and therefore some special handling is required for blits. > +PIPE_FORMAT_Z24_UNORM_S8_UINT_AS_R8G8B8A8 , plain, 1, 1, un8 , un8 , un8 > , un8 , xyzw, rgb > + > # YUV formats > # http://www.fourcc.org/yuv.php#UYVY > PIPE_FORMAT_UYVY , subsampled, 2, 1, x32 , , , > , xyz1, yuv > diff --git a/src/gallium/drivers/svga/svga_format.c > b/src/gallium/drivers/svga/svga_format.c > index 830ff0a1e6b..84134018c17 100644 > --- a/src/gallium/drivers/svga/svga_format.c > +++ b/src/gallium/drivers/svga/svga_format.c > @@ -378,6 +378,7 @@ static const struct vgpu10_format_entry > format_conversion_table[] = > { PIPE_FORMAT_ATC_RGB, SVGA3D_FORMAT_INVALID, > SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, > { PIPE_FORMAT_ATC_RGBA_EXPLICIT, SVGA3D_FORMAT_INVALID, > SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, > { PIPE_FORMAT_ATC_RGBA_INTERPOLATED, SVGA3D_FORMAT_INVALID, > SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, > + { PIPE_FORMAT_Z24_UNORM_S8_UINT_AS_R8G8B8A8, SVGA3D_FORMAT_INVALID, > SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, > }; > > > diff --git a/src/gallium/include/pipe/p_format.h > b/src/gallium/include/pipe/p_format.h > index a4401658f5f..42908e9a720 100644 > --- a/src/gallium/include/pipe/p_format.h > +++ b/src/gallium/include/pipe/p_format.h > @@ -407,6 +407,8 @@ enum pipe_format { > PIPE_FORMAT_ATC_RGBA_EXPLICIT = 318, > PIPE_FORMAT_ATC_RGBA_INTERPOLATED = 319, > > + PIPE_FORMAT_Z24_UNORM_S8_UINT_AS_R8G8B8A8 = 320, > + > PIPE_FORMAT_COUNT > }; > > -- > 2.20.1 > > _______________________________________________ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev
_______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
