From: Marek Olšák <[email protected]>
It will be modified by compute shader culling.
---
src/gallium/drivers/radeonsi/si_state_draw.c | 36 ++++++++++++--------
1 file changed, 22 insertions(+), 14 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c
b/src/gallium/drivers/radeonsi/si_state_draw.c
index bf091827828..ba77fb68dcc 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -494,6 +494,7 @@ static unsigned si_get_ia_multi_vgt_param(struct si_context
*sctx,
const struct pipe_draw_info *info,
enum pipe_prim_type prim,
unsigned num_patches,
+ unsigned instance_count,
bool primitive_restart)
{
union si_vgt_param_key key = sctx->ia_multi_vgt_param_key;
@@ -509,10 +510,10 @@ static unsigned si_get_ia_multi_vgt_param(struct
si_context *sctx,
}
key.u.prim = prim;
- key.u.uses_instancing = info->indirect || info->instance_count > 1;
+ key.u.uses_instancing = info->indirect || instance_count > 1;
key.u.multi_instances_smaller_than_primgroup =
info->indirect ||
- (info->instance_count > 1 &&
+ (instance_count > 1 &&
(info->count_from_stream_output ||
si_num_prims_for_vertices(info, prim) < primgroup_size));
key.u.primitive_restart = primitive_restart;
@@ -534,7 +535,7 @@ static unsigned si_get_ia_multi_vgt_param(struct si_context
*sctx,
if (sctx->family == CHIP_HAWAII &&
G_028AA8_SWITCH_ON_EOI(ia_multi_vgt_param) &&
(info->indirect ||
- (info->instance_count > 1 &&
+ (instance_count > 1 &&
(info->count_from_stream_output ||
si_num_prims_for_vertices(info, prim) <= 1))))
sctx->flags |= SI_CONTEXT_VGT_FLUSH;
@@ -618,6 +619,7 @@ static void si_emit_draw_registers(struct si_context *sctx,
const struct pipe_draw_info *info,
enum pipe_prim_type prim,
unsigned num_patches,
+ unsigned instance_count,
bool primitive_restart)
{
struct radeon_cmdbuf *cs = sctx->gfx_cs;
@@ -625,7 +627,7 @@ static void si_emit_draw_registers(struct si_context *sctx,
unsigned ia_multi_vgt_param;
ia_multi_vgt_param = si_get_ia_multi_vgt_param(sctx, info, prim,
num_patches,
- primitive_restart);
+ instance_count,
primitive_restart);
/* Draw state. */
if (ia_multi_vgt_param != sctx->last_multi_vgt_param) {
@@ -673,7 +675,8 @@ static void si_emit_draw_packets(struct si_context *sctx,
const struct pipe_draw_info *info,
struct pipe_resource *indexbuf,
unsigned index_size,
- unsigned index_offset)
+ unsigned index_offset,
+ unsigned instance_count)
{
struct pipe_draw_indirect_info *indirect = info->indirect;
struct radeon_cmdbuf *cs = sctx->gfx_cs;
@@ -815,7 +818,6 @@ static void si_emit_draw_packets(struct si_context *sctx,
radeon_emit(cs, di_src_sel);
}
} else {
- unsigned instance_count = info->instance_count;
int base_vertex;
if (sctx->last_instance_count == SI_INSTANCE_COUNT_UNKNOWN ||
@@ -1204,8 +1206,8 @@ static void si_get_draw_start_count(struct si_context
*sctx,
}
static void si_emit_all_states(struct si_context *sctx, const struct
pipe_draw_info *info,
- enum pipe_prim_type prim, bool primitive_restart,
- unsigned skip_atom_mask)
+ enum pipe_prim_type prim, unsigned
instance_count,
+ bool primitive_restart, unsigned skip_atom_mask)
{
unsigned num_patches = 0;
/* Vega10/Raven scissor bug workaround. When any context register is
@@ -1258,7 +1260,8 @@ static void si_emit_all_states(struct si_context *sctx,
const struct pipe_draw_i
/* Emit draw states. */
si_emit_vs_state(sctx, info);
- si_emit_draw_registers(sctx, info, prim, num_patches,
primitive_restart);
+ si_emit_draw_registers(sctx, info, prim, num_patches, instance_count,
+ primitive_restart);
}
static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info
*info)
@@ -1270,6 +1273,7 @@ static void si_draw_vbo(struct pipe_context *ctx, const
struct pipe_draw_info *i
enum pipe_prim_type rast_prim, prim = info->mode;
unsigned index_size = info->index_size;
unsigned index_offset = info->indirect ? info->start * index_size : 0;
+ unsigned instance_count = info->instance_count;
bool primitive_restart = info->primitive_restart;
if (likely(!info->indirect)) {
@@ -1277,7 +1281,7 @@ static void si_draw_vbo(struct pipe_context *ctx, const
struct pipe_draw_info *i
* no workaround for indirect draws, but we can at least skip
* direct draws.
*/
- if (unlikely(!info->instance_count))
+ if (unlikely(!instance_count))
return;
/* Handle count == 0. */
@@ -1474,7 +1478,8 @@ static void si_draw_vbo(struct pipe_context *ctx, const
struct pipe_draw_info *i
goto return_cleanup;
/* Emit all states except possibly render condition. */
- si_emit_all_states(sctx, info, prim, primitive_restart,
masked_atoms);
+ si_emit_all_states(sctx, info, prim, instance_count,
+ primitive_restart, masked_atoms);
si_emit_cache_flush(sctx);
/* <-- CUs are idle here. */
@@ -1482,7 +1487,8 @@ static void si_draw_vbo(struct pipe_context *ctx, const
struct pipe_draw_info *i
sctx->atoms.s.render_cond.emit(sctx);
sctx->dirty_atoms = 0;
- si_emit_draw_packets(sctx, info, indexbuf, index_size,
index_offset);
+ si_emit_draw_packets(sctx, info, indexbuf, index_size,
index_offset,
+ instance_count);
/* <-- CUs are busy here. */
/* Start prefetches after the draw has been started. Both will
run
@@ -1504,8 +1510,10 @@ static void si_draw_vbo(struct pipe_context *ctx, const
struct pipe_draw_info *i
if (!si_upload_graphics_shader_descriptors(sctx))
return;
- si_emit_all_states(sctx, info, prim, primitive_restart, 0);
- si_emit_draw_packets(sctx, info, indexbuf, index_size,
index_offset);
+ si_emit_all_states(sctx, info, prim, instance_count,
+ primitive_restart, 0);
+ si_emit_draw_packets(sctx, info, indexbuf, index_size,
index_offset,
+ instance_count);
/* Prefetch the remaining shaders after the draw has been
* started. */
--
2.17.1
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