On Wed, Jan 23, 2019 at 02:25:14PM -0800, Nanley Chery wrote:
> On Fri, Oct 12, 2018 at 01:46:37PM -0500, Jason Ekstrand wrote:
> > The Yf and Ys tilings change a bit between gen9 and gen10 so we have to
> > be able to distinguish between them.
> > ---
> > src/intel/isl/isl.c | 12 ++++++------
> > src/intel/isl/isl.h | 16 ++++++++--------
> > src/intel/isl/isl_drm.c | 4 ++--
> > src/intel/isl/isl_gen7.c | 8 ++++----
> > src/intel/isl/isl_gen9.c | 2 +-
> > src/intel/isl/isl_surface_state.c | 4 ++--
> > 6 files changed, 23 insertions(+), 23 deletions(-)
> >
> > diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
> > index d6beee987b5..392c15ca3fb 100644
> > --- a/src/intel/isl/isl.c
> > +++ b/src/intel/isl/isl.c
> > @@ -217,9 +217,9 @@ isl_tiling_get_info(enum isl_tiling tiling,
> > phys_B = isl_extent2d(128, 32);
> > break;
> >
> > - case ISL_TILING_Yf:
> > - case ISL_TILING_Ys: {
> > - bool is_Ys = tiling == ISL_TILING_Ys;
> > + case ISL_TILING_GEN9_Yf:
> > + case ISL_TILING_GEN9_Ys: {
> > + bool is_Ys = tiling == ISL_TILING_GEN9_Ys;
> >
> > assert(bs > 0);
> > unsigned width = 1 << (6 + (ffs(bs) / 2) + (2 * is_Ys));
> > @@ -375,8 +375,8 @@ isl_surf_choose_tiling(const struct isl_device *dev,
> > CHOOSE(ISL_TILING_LINEAR);
> > }
> >
> > - CHOOSE(ISL_TILING_Ys);
> > - CHOOSE(ISL_TILING_Yf);
> > + CHOOSE(ISL_TILING_GEN9_Ys);
> > + CHOOSE(ISL_TILING_GEN9_Yf);
> > CHOOSE(ISL_TILING_Y0);
> > CHOOSE(ISL_TILING_X);
> > CHOOSE(ISL_TILING_W);
> > @@ -715,7 +715,7 @@ isl_calc_phys_level0_extent_sa(const struct isl_device
> > *dev,
> > assert(dim_layout == ISL_DIM_LAYOUT_GEN4_2D ||
> > dim_layout == ISL_DIM_LAYOUT_GEN6_STENCIL_HIZ);
> >
> > - if (tiling == ISL_TILING_Ys && info->samples > 1)
> > + if (tiling == ISL_TILING_GEN9_Ys && info->samples > 1)
> > isl_finishme("%s:%s: multisample TileYs layout", __FILE__,
> > __func__);
> >
>
> Shouldn't the next patch be updated with a similar change?
>
This block is never deleted in this series.
> > switch (msaa_layout) {
> > diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
> > index 4f8d38e22fb..1c7990f2dc7 100644
> > --- a/src/intel/isl/isl.h
> > +++ b/src/intel/isl/isl.h
> > @@ -460,8 +460,8 @@ enum isl_tiling {
> > ISL_TILING_W,
> > ISL_TILING_X,
> > ISL_TILING_Y0, /**< Legacy Y tiling */
> > - ISL_TILING_Yf, /**< Standard 4K tiling. The 'f' means "four". */
> > - ISL_TILING_Ys, /**< Standard 64K tiling. The 's' means "sixty-four". */
> > + ISL_TILING_GEN9_Yf, /**< Standard 4K tiling. The 'f' means "four". */
> > + ISL_TILING_GEN9_Ys, /**< Standard 64K tiling. The 's' means
> > "sixty-four". */
> > ISL_TILING_HIZ, /**< Tiling format for HiZ surfaces */
> > ISL_TILING_CCS, /**< Tiling format for CCS surfaces */
> > };
> > @@ -475,8 +475,8 @@ typedef uint32_t isl_tiling_flags_t;
> > #define ISL_TILING_W_BIT (1u << ISL_TILING_W)
> > #define ISL_TILING_X_BIT (1u << ISL_TILING_X)
> > #define ISL_TILING_Y0_BIT (1u << ISL_TILING_Y0)
> > -#define ISL_TILING_Yf_BIT (1u << ISL_TILING_Yf)
> > -#define ISL_TILING_Ys_BIT (1u << ISL_TILING_Ys)
> > +#define ISL_TILING_GEN9_Yf_BIT (1u << ISL_TILING_GEN9_Yf)
> > +#define ISL_TILING_GEN9_Ys_BIT (1u << ISL_TILING_GEN9_Ys)
> > #define ISL_TILING_HIZ_BIT (1u << ISL_TILING_HIZ)
> > #define ISL_TILING_CCS_BIT (1u << ISL_TILING_CCS)
> > #define ISL_TILING_ANY_MASK (~0u)
> > @@ -484,12 +484,12 @@ typedef uint32_t isl_tiling_flags_t;
> >
> > /** Any Y tiling, including legacy Y tiling. */
> > #define ISL_TILING_ANY_Y_MASK (ISL_TILING_Y0_BIT | \
> > - ISL_TILING_Yf_BIT | \
> > - ISL_TILING_Ys_BIT)
> > + ISL_TILING_GEN9_Yf_BIT | \
> > + ISL_TILING_GEN9_Ys_BIT)
> >
> > /** The Skylake BSpec refers to Yf and Ys as "standard tiling formats". */
> > -#define ISL_TILING_STD_Y_MASK (ISL_TILING_Yf_BIT | \
> > - ISL_TILING_Ys_BIT)
> > +#define ISL_TILING_STD_Y_MASK (ISL_TILING_GEN9_Yf_BIT | \
> > + ISL_TILING_GEN9_Ys_BIT)
> > /** @} */
> >
> > /**
> > diff --git a/src/intel/isl/isl_drm.c b/src/intel/isl/isl_drm.c
> > index e16d7b63917..62fdd22d10d 100644
> > --- a/src/intel/isl/isl_drm.c
> > +++ b/src/intel/isl/isl_drm.c
> > @@ -44,8 +44,8 @@ isl_tiling_to_i915_tiling(enum isl_tiling tiling)
> > return I915_TILING_Y;
> >
> > case ISL_TILING_W:
> > - case ISL_TILING_Yf:
> > - case ISL_TILING_Ys:
> > + case ISL_TILING_GEN9_Yf:
> > + case ISL_TILING_GEN9_Ys:
> > case ISL_TILING_HIZ:
> > case ISL_TILING_CCS:
> > return I915_TILING_NONE;
> > diff --git a/src/intel/isl/isl_gen7.c b/src/intel/isl/isl_gen7.c
> > index a9db21fba52..91cea299abc 100644
> > --- a/src/intel/isl/isl_gen7.c
> > +++ b/src/intel/isl/isl_gen7.c
> > @@ -198,15 +198,15 @@ isl_gen6_filter_tiling(const struct isl_device *dev,
> >
> > /* Clear flags unsupported on this hardware */
> > if (ISL_DEV_GEN(dev) < 9) {
> > - *flags &= ~ISL_TILING_Yf_BIT;
> > - *flags &= ~ISL_TILING_Ys_BIT;
> > + *flags &= ~ISL_TILING_GEN9_Yf_BIT;
> > + *flags &= ~ISL_TILING_GEN9_Ys_BIT;
> > }
> >
> > /* And... clear the Yf and Ys bits anyway because Anvil doesn't support
> > * them yet.
> > */
> > - *flags &= ~ISL_TILING_Yf_BIT; /* FINISHME[SKL]: Support Yf */
> > - *flags &= ~ISL_TILING_Ys_BIT; /* FINISHME[SKL]: Support Ys */
> > + *flags &= ~ISL_TILING_GEN9_Yf_BIT; /* FINISHME[SKL]: Support Yf */
> > + *flags &= ~ISL_TILING_GEN9_Ys_BIT; /* FINISHME[SKL]: Support Ys */
> >
> > if (isl_surf_usage_is_depth(info->usage)) {
> > /* Depth requires Y. */
> > diff --git a/src/intel/isl/isl_gen9.c b/src/intel/isl/isl_gen9.c
> > index e5d0f95402a..8e460430a1c 100644
> > --- a/src/intel/isl/isl_gen9.c
> > +++ b/src/intel/isl/isl_gen9.c
> > @@ -41,7 +41,7 @@ gen9_calc_std_image_alignment_sa(const struct isl_device
> > *dev,
> > assert(isl_tiling_is_std_y(tiling));
> >
> > const uint32_t bpb = fmtl->bpb;
> > - const uint32_t is_Ys = tiling == ISL_TILING_Ys;
> > + const uint32_t is_Ys = tiling == ISL_TILING_GEN9_Ys;
>
> Was this forgotten on the next patch?
>
Okay, I see that this function is currently unused and deleted later on.
-Nanley
> This patch is
> Reviewed-by: Nanley Chery <[email protected]>
>
>
> >
> > switch (info->dim) {
> > case ISL_SURF_DIM_1D:
> > diff --git a/src/intel/isl/isl_surface_state.c
> > b/src/intel/isl/isl_surface_state.c
> > index 7ab260d701b..6ac0969f00c 100644
> > --- a/src/intel/isl/isl_surface_state.c
> > +++ b/src/intel/isl/isl_surface_state.c
> > @@ -70,8 +70,8 @@ static const uint8_t isl_to_gen_tiling[] = {
> > [ISL_TILING_LINEAR] = LINEAR,
> > [ISL_TILING_X] = XMAJOR,
> > [ISL_TILING_Y0] = YMAJOR,
> > - [ISL_TILING_Yf] = YMAJOR,
> > - [ISL_TILING_Ys] = YMAJOR,
> > + [ISL_TILING_GEN9_Yf] = YMAJOR,
> > + [ISL_TILING_GEN9_Ys] = YMAJOR,
> > [ISL_TILING_W] = WMAJOR,
> > };
> > #endif
> > --
> > 2.19.1
> >
> > _______________________________________________
> > mesa-dev mailing list
> > [email protected]
> > https://lists.freedesktop.org/mailman/listinfo/mesa-dev
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