On Thu, Jan 25, 2018 at 8:29 AM, Wladimir J. van der Laan <[email protected]> wrote: > Also update BLEND_ to BLEND2_ opcodes to accomodate.
Are you saying this doesn't compile right now? I would have expected the accompanying change to a2xx.xml.h for that. Perhaps this landed into the wrong commit? Also it's odd that the formats are so different than originally entered. Any opinion on how that happened? > > Signed-off-by: Wladimir J. van der Laan <[email protected]> > --- > src/gallium/drivers/freedreno/a2xx/a2xx.xml.h | 33 > +++++++++++---------------- > src/gallium/drivers/freedreno/a2xx/fd2_gmem.c | 4 ++-- > 2 files changed, 15 insertions(+), 22 deletions(-) > > diff --git a/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h > b/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h > index 55a4355..279a652 100644 > --- a/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h > +++ b/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h > @@ -84,13 +84,12 @@ enum a2xx_sq_surfaceformat { > FMT_5_5_5_1 = 13, > FMT_8_8_8_8_A = 14, > FMT_4_4_4_4 = 15, > - FMT_10_11_11 = 16, > - FMT_11_11_10 = 17, > + FMT_8_8_8 = 16, > FMT_DXT1 = 18, > FMT_DXT2_3 = 19, > FMT_DXT4_5 = 20, > + FMT_10_10_10_2 = 21, > FMT_24_8 = 22, > - FMT_24_8_FLOAT = 23, > FMT_16 = 24, > FMT_16_16 = 25, > FMT_16_16_16_16 = 26, > @@ -106,29 +105,23 @@ enum a2xx_sq_surfaceformat { > FMT_32_FLOAT = 36, > FMT_32_32_FLOAT = 37, > FMT_32_32_32_32_FLOAT = 38, > - FMT_32_AS_8 = 39, > - FMT_32_AS_8_8 = 40, > - FMT_16_MPEG = 41, > - FMT_16_16_MPEG = 42, > - FMT_8_INTERLACED = 43, > - FMT_32_AS_8_INTERLACED = 44, > - FMT_32_AS_8_8_INTERLACED = 45, > - FMT_16_INTERLACED = 46, > - FMT_16_MPEG_INTERLACED = 47, > - FMT_16_16_MPEG_INTERLACED = 48, > + FMT_ATI_TC_RGB = 39, > + FMT_ATI_TC_RGBA = 40, > + FMT_ATI_TC_555_565_RGB = 41, > + FMT_ATI_TC_555_565_RGBA = 42, > + FMT_ATI_TC_RGBA_INTERP = 43, > + FMT_ATI_TC_555_565_RGBA_INTERP = 44, > + FMT_ETC1_RGBA_INTERP = 46, > + FMT_ETC1_RGB = 47, > + FMT_ETC1_RGBA = 48, > FMT_DXN = 49, > - FMT_8_8_8_8_AS_16_16_16_16 = 50, > - FMT_DXT1_AS_16_16_16_16 = 51, > - FMT_DXT2_3_AS_16_16_16_16 = 52, > - FMT_DXT4_5_AS_16_16_16_16 = 53, > + FMT_2_3_3 = 51, > FMT_2_10_10_10_AS_16_16_16_16 = 54, > - FMT_10_11_11_AS_16_16_16_16 = 55, > - FMT_11_11_10_AS_16_16_16_16 = 56, > + FMT_10_10_10_2_AS_16_16_16_16 = 55, > FMT_32_32_32_FLOAT = 57, > FMT_DXT3A = 58, > FMT_DXT5A = 59, > FMT_CTX1 = 60, > - FMT_DXT3A_AS_1_1_1_1 = 61, > }; > > enum a2xx_sq_ps_vtx_mode { > diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c > b/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c > index 0905ab6..46a7d18 100644 > --- a/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c > +++ b/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c > @@ -293,10 +293,10 @@ fd2_emit_tile_mem2gmem(struct fd_batch *batch, struct > fd_tile *tile) > OUT_PKT3(ring, CP_SET_CONSTANT, 2); > OUT_RING(ring, CP_REG(REG_A2XX_RB_BLEND_CONTROL)); > OUT_RING(ring, A2XX_RB_BLEND_CONTROL_COLOR_SRCBLEND(FACTOR_ONE) | > - > A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN(BLEND_DST_PLUS_SRC) | > + > A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN(BLEND2_DST_PLUS_SRC) | > A2XX_RB_BLEND_CONTROL_COLOR_DESTBLEND(FACTOR_ZERO) | > A2XX_RB_BLEND_CONTROL_ALPHA_SRCBLEND(FACTOR_ONE) | > - > A2XX_RB_BLEND_CONTROL_ALPHA_COMB_FCN(BLEND_DST_PLUS_SRC) | > + > A2XX_RB_BLEND_CONTROL_ALPHA_COMB_FCN(BLEND2_DST_PLUS_SRC) | > A2XX_RB_BLEND_CONTROL_ALPHA_DESTBLEND(FACTOR_ZERO)); > > OUT_PKT3(ring, CP_SET_CONSTANT, 3); > -- > 2.7.4 > > _______________________________________________ > Freedreno mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/freedreno _______________________________________________ mesa-dev mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-dev
