Assuming you tested with vega, Reviewed-by: Bas Nieuwenhuizen <[email protected]>
On Thu, Dec 21, 2017 at 5:45 PM, Samuel Pitoiset <[email protected]> wrote: > Signed-off-by: Samuel Pitoiset <[email protected]> > --- > src/amd/vulkan/radv_image.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c > index efd17e4889..15410f140e 100644 > --- a/src/amd/vulkan/radv_image.c > +++ b/src/amd/vulkan/radv_image.c > @@ -813,7 +813,7 @@ static inline bool > radv_image_can_enable_dcc_or_cmask(struct radv_image *image) > { > if (image->info.samples <= 1 && > - image->info.width <= 512 && image->info.height <= 512) { > + image->info.width * image->info.height <= 512 * 512) { > /* Do not enable CMASK or DCC for small surfaces where the > cost > * of the eliminate pass can be higher than the benefit of > fast > * clear. RadeonSI does this, but the image threshold is > -- > 2.15.1 > > _______________________________________________ > mesa-dev mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/mesa-dev _______________________________________________ mesa-dev mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-dev
