Signed-off-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
---
src/intel/compiler/brw_shader.cpp | 13 +++++++++++++
src/mesa/drivers/dri/i965/brw_program.c | 10 +++++++++-
2 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/src/intel/compiler/brw_shader.cpp
b/src/intel/compiler/brw_shader.cpp
index 234b5a11c1..cc9297772b 100644
--- a/src/intel/compiler/brw_shader.cpp
+++ b/src/intel/compiler/brw_shader.cpp
@@ -78,6 +78,19 @@ type_size_scalar(const struct glsl_type *type)
return 0;
}
+/* Variant of type_size_scalar() taking into account that GL core and api
+ * don't deal with 16-bit uniforms but with 32-bit. Only compiler backend can
+ * work with reduced precision if desired.
+ */
+extern "C" int
+uniform_storage_type_size_scalar(const struct glsl_type *type)
+{
+ if (type->base_type == GLSL_TYPE_FLOAT16)
+ return type->components();
+
+ return type_size_scalar(type);
+}
+
enum brw_reg_type
brw_type_for_base_type(const struct glsl_type *type)
{
diff --git a/src/mesa/drivers/dri/i965/brw_program.c
b/src/mesa/drivers/dri/i965/brw_program.c
index 755d4973cc..4573d9d303 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -47,12 +47,20 @@
#include "brw_defines.h"
#include "intel_batchbuffer.h"
+int uniform_storage_type_size_scalar(const struct glsl_type *type);
+
+static int
+uniform_storage_type_size_scalar_bytes(const struct glsl_type *type)
+{
+ return uniform_storage_type_size_scalar(type) * 4;
+}
+
static bool
brw_nir_lower_uniforms(nir_shader *nir, bool is_scalar)
{
if (is_scalar) {
nir_assign_var_locations(&nir->uniforms, &nir->num_uniforms,
- type_size_scalar_bytes);
+ uniform_storage_type_size_scalar_bytes);
return nir_lower_io(nir, nir_var_uniform, type_size_scalar_bytes, 0);
} else {
nir_assign_var_locations(&nir->uniforms, &nir->num_uniforms,
--
2.11.0
_______________________________________________
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
