---
src/amd/common/ac_nir_to_llvm.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 7424cc93f9..75fdc774fb 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2803,33 +2803,33 @@ store_tcs_output(struct nir_to_llvm_context *ctx,
dw_addr = get_tcs_out_current_patch_data_offset(ctx);
}
mark_tess_output(ctx, instr->variables[0]->var->data.patch, param);
dw_addr = get_dw_address(ctx, dw_addr, param, const_index, is_compact,
vertex_index, stride,
indir_index);
buf_addr = get_tcs_tes_buffer_address_params(ctx, param, const_index,
is_compact,
vertex_index, indir_index);
+ bool is_tess_factor = false;
+ if (instr->variables[0]->var->data.location ==
VARYING_SLOT_TESS_LEVEL_INNER ||
+ instr->variables[0]->var->data.location ==
VARYING_SLOT_TESS_LEVEL_OUTER)
+ is_tess_factor = true;
+
unsigned base = is_compact ? const_index : 0;
for (unsigned chan = 0; chan < 8; chan++) {
- bool is_tess_factor = false;
if (!(writemask & (1 << chan)))
continue;
LLVMValueRef value = llvm_extract_elem(&ctx->ac, src, chan);
lds_store(ctx, dw_addr, value);
- if (instr->variables[0]->var->data.location ==
VARYING_SLOT_TESS_LEVEL_INNER ||
- instr->variables[0]->var->data.location ==
VARYING_SLOT_TESS_LEVEL_OUTER)
- is_tess_factor = true;
-
if (!is_tess_factor && writemask != 0xF)
ac_build_buffer_store_dword(&ctx->ac,
ctx->hs_ring_tess_offchip, value, 1,
buf_addr, ctx->oc_lds,
4 * (base + chan), 1, 0,
true, false);
dw_addr = LLVMBuildAdd(ctx->builder, dw_addr,
ctx->i32one, "");
}
if (writemask == 0xF) {
--
2.13.6
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