On 07.09.2017 12:26, Dave Airlie wrote:
On 7 Sep. 2017 6:34 pm, "Nicolai Hähnle" <[email protected] <mailto:[email protected]>> wrote:On 07.09.2017 09 <tel:07.09.2017%2009>:58, Bas Nieuwenhuizen wrote: I'm not really happy with this, what happens if a game actually uses e.g. indirect count in a secondary cmd buf? Note that some packets that require fetching data in the CP cannot be run in secondary command buffers, because the data fetching path overlaps with that used for fetching IB2. I thought this only affects SET_PREDICATION and OCCLUSION_QUERY though.Can you check it, it may be multi indirect is busted on some firmwares, this seems cik specific.
Is this IB1 or IB2? I just checked, and at least the fetcher problem affecting SET_PREDICATION should not affect the various multi draw packets.
Also is set predication a problem for all Pred setting types?
Huh, it looks like the DX12/Vulkan/Bool mode actually takes a different path. So only occlusion queries and streamout overflow are affected. TIL.
Cheers, Nicolai
Dave. That said this patch seems correct, so Reviewed-by: Bas Nieuwenhuizen <[email protected] <mailto:[email protected]>> You may want to nominate this for stable (and provide a backport probably..) On Thu, Sep 7, 2017, at 05:03, Dave Airlie wrote: From: Dave Airlie <[email protected] <mailto:[email protected]>> This fixes some observed hangs on CIK GPUs. Signed-off-by: Dave Airlie <[email protected] <mailto:[email protected]>> --- src/amd/vulkan/radv_cmd_buffer.c | 37 +++++++++++++++++++++++-------------- 1 file changed, 23 insertions(+), 14 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index b372123..bc4aeb3 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -2834,20 +2834,29 @@ radv_cs_emit_indirect_draw_packet(struct radv_cmd_buffer *cmd_buffer, uint32_t base_reg = cmd_buffer->state.pipeline->graphics.vtx_base_sgpr; assert(base_reg); - radeon_emit(cs, PKT3(indexed ? PKT3_DRAW_INDEX_INDIRECT_MULTI : - PKT3_DRAW_INDIRECT_MULTI, - 8, false)); - radeon_emit(cs, 0); - radeon_emit(cs, (base_reg - SI_SH_REG_OFFSET) >> 2); - radeon_emit(cs, ((base_reg + 4) - SI_SH_REG_OFFSET) >> 2); - radeon_emit(cs, (((base_reg + 8) - SI_SH_REG_OFFSET) >> 2) |- S_2C3_DRAW_INDEX_ENABLE(draw_id_enable) | - S_2C3_COUNT_INDIRECT_ENABLE(!!count_va));- radeon_emit(cs, draw_count); /* count */ - radeon_emit(cs, count_va); /* count_addr */ - radeon_emit(cs, count_va >> 32); - radeon_emit(cs, stride); /* stride */ - radeon_emit(cs, di_src_sel); + if (draw_count == 1 && !count_va && !draw_id_enable) { + radeon_emit(cs, PKT3(indexed ? PKT3_DRAW_INDEX_INDIRECT : + PKT3_DRAW_INDIRECT, 3, false)); + radeon_emit(cs, 0); + radeon_emit(cs, (base_reg - SI_SH_REG_OFFSET) >> 2); + radeon_emit(cs, ((base_reg + 4) - SI_SH_REG_OFFSET) >> 2); + radeon_emit(cs, di_src_sel); + } else { + radeon_emit(cs, PKT3(indexed ? PKT3_DRAW_INDEX_INDIRECT_MULTI : + PKT3_DRAW_INDIRECT_MULTI, + 8, false)); + radeon_emit(cs, 0); + radeon_emit(cs, (base_reg - SI_SH_REG_OFFSET) >> 2); + radeon_emit(cs, ((base_reg + 4) - SI_SH_REG_OFFSET) >> 2); + radeon_emit(cs, (((base_reg + 8) - SI_SH_REG_OFFSET) >> 2) |+ S_2C3_DRAW_INDEX_ENABLE(draw_id_enable) | + S_2C3_COUNT_INDIRECT_ENABLE(!!count_va));+ radeon_emit(cs, draw_count); /* count */ + radeon_emit(cs, count_va); /* count_addr */ + radeon_emit(cs, count_va >> 32); + radeon_emit(cs, stride); /* stride */ + radeon_emit(cs, di_src_sel); + } } static void-- 2.9.4_______________________________________________ mesa-dev mailing list [email protected] <mailto:[email protected]> https://lists.freedesktop.org/mailman/listinfo/mesa-dev <https://lists.freedesktop.org/mailman/listinfo/mesa-dev> _______________________________________________ mesa-dev mailing list [email protected] <mailto:[email protected]> https://lists.freedesktop.org/mailman/listinfo/mesa-dev <https://lists.freedesktop.org/mailman/listinfo/mesa-dev>-- Lerne, wie die Welt wirklich ist,Aber vergiss niemals, wie sie sein sollte. _______________________________________________ mesa-dev mailing list [email protected] <mailto:[email protected]> https://lists.freedesktop.org/mailman/listinfo/mesa-dev <https://lists.freedesktop.org/mailman/listinfo/mesa-dev>
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