From: Nicolai Hähnle <[email protected]>
This allows drivers more freedom in how exactly they want to lower I/O,
e.g. first lowering I/O to temporaries.
---
src/gallium/drivers/freedreno/ir3/ir3_shader.c | 6 ++++++
src/gallium/drivers/vc4/vc4_program.c | 3 +++
src/mesa/state_tracker/st_glsl_to_nir.cpp | 3 +--
3 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_shader.c
b/src/gallium/drivers/freedreno/ir3/ir3_shader.c
index 636111b..ec88342 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_shader.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_shader.c
@@ -289,20 +289,23 @@ ir3_shader_create(struct ir3_compiler *compiler,
{
struct ir3_shader *shader = CALLOC_STRUCT(ir3_shader);
shader->compiler = compiler;
shader->id = ++shader->compiler->shader_count;
shader->type = type;
nir_shader *nir;
if (cso->type == PIPE_SHADER_IR_NIR) {
/* we take ownership of the reference: */
nir = cso->ir.nir;
+
+ NIR_PASS_V(nir, nir_lower_io, nir_var_all, ir3_glsl_type_size,
+ (nir_lower_io_options)0);
} else {
debug_assert(cso->type == PIPE_SHADER_IR_TGSI);
if (fd_mesa_debug & FD_DBG_DISASM) {
DBG("dump tgsi: type=%d", shader->type);
tgsi_dump(cso->tokens, 0);
}
nir = ir3_tgsi_to_nir(cso->tokens);
}
/* do first pass optimization, ignoring the key: */
shader->nir = ir3_optimize_nir(shader, nir, NULL);
@@ -335,20 +338,23 @@ ir3_shader_create_compute(struct ir3_compiler *compiler,
struct ir3_shader *shader = CALLOC_STRUCT(ir3_shader);
shader->compiler = compiler;
shader->id = ++shader->compiler->shader_count;
shader->type = SHADER_COMPUTE;
nir_shader *nir;
if (cso->ir_type == PIPE_SHADER_IR_NIR) {
/* we take ownership of the reference: */
nir = (nir_shader *)cso->prog;
+
+ NIR_PASS_V(nir, nir_lower_io, nir_var_all, ir3_glsl_type_size,
+ (nir_lower_io_options)0);
} else {
debug_assert(cso->ir_type == PIPE_SHADER_IR_TGSI);
if (fd_mesa_debug & FD_DBG_DISASM) {
DBG("dump tgsi: type=%d", shader->type);
tgsi_dump(cso->prog, 0);
}
nir = ir3_tgsi_to_nir(cso->prog);
}
/* do first pass optimization, ignoring the key: */
diff --git a/src/gallium/drivers/vc4/vc4_program.c
b/src/gallium/drivers/vc4/vc4_program.c
index 3beac61..999c154 100644
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -2420,20 +2420,23 @@ vc4_shader_state_create(struct pipe_context *pctx,
so->program_id = vc4->next_uncompiled_program_id++;
nir_shader *s;
if (cso->type == PIPE_SHADER_IR_NIR) {
/* The backend takes ownership of the NIR shader on state
* creation.
*/
s = cso->ir.nir;
+
+ NIR_PASS_V(s, nir_lower_io, nir_var_all, type_size,
+ (nir_lower_io_options)0);
} else {
assert(cso->type == PIPE_SHADER_IR_TGSI);
if (vc4_debug & VC4_DEBUG_TGSI) {
fprintf(stderr, "prog %d TGSI:\n",
so->program_id);
tgsi_dump(cso->tokens, 0);
fprintf(stderr, "\n");
}
s = tgsi_to_nir(cso->tokens, &nir_options);
diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp
b/src/mesa/state_tracker/st_glsl_to_nir.cpp
index dd3d6fa..7f5a9af 100644
--- a/src/mesa/state_tracker/st_glsl_to_nir.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_nir.cpp
@@ -370,22 +370,21 @@ st_finalize_nir(struct st_context *st, struct gl_program
*prog, nir_shader *nir)
return;
}
NIR_PASS_V(nir, nir_lower_atomics_to_ssbo,
st->ctx->Const.Program[nir->stage].MaxAtomicBuffers);
st_nir_assign_uniform_locations(prog, shader_program,
&nir->uniforms, &nir->num_uniforms);
NIR_PASS_V(nir, nir_lower_system_values);
- NIR_PASS_V(nir, nir_lower_io, nir_var_all, type_size,
- (nir_lower_io_options)0);
+
if (screen->get_param(screen, PIPE_CAP_NIR_SAMPLERS_AS_DEREF))
NIR_PASS_V(nir, nir_lower_samplers_as_deref, shader_program);
else
NIR_PASS_V(nir, nir_lower_samplers, shader_program);
}
struct gl_program *
st_nir_get_mesa_program(struct gl_context *ctx,
struct gl_shader_program *shader_program,
struct gl_linked_shader *shader)
--
2.9.3
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