From: Chris Wilson <[email protected]> The manual detiling paths are not prepared to handle Gen4-G45 with swizzling enabled, so explicitly disable them. (They're already disabled because these platforms don't have LLC but the next patch will enable this path).
Reviewed-by: Matt Turner <[email protected]> --- src/mesa/drivers/dri/i965/intel_pixel_read.c | 7 +++++++ src/mesa/drivers/dri/i965/intel_tex_image.c | 7 +++++++ src/mesa/drivers/dri/i965/intel_tex_subimage.c | 7 +++++++ 3 files changed, 21 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c b/src/mesa/drivers/dri/i965/intel_pixel_read.c index 4614279..eb3f66f 100644 --- a/src/mesa/drivers/dri/i965/intel_pixel_read.c +++ b/src/mesa/drivers/dri/i965/intel_pixel_read.c @@ -133,6 +133,13 @@ intel_readpixels_tiled_memcpy(struct gl_context * ctx, return false; } + /* linear_to_tiled() assumes that if the object is swizzled, it + * is using I915_BIT6_SWIZZLE_9_10 for X and I915_BIT6_SWIZZLE_9 for Y. + * This is only true on gen5 and above. + */ + if (brw->gen < 5 && brw->has_swizzling) + return false; + /* Since we are going to read raw data to the miptree, we need to resolve * any pending fast color clears before we start. */ diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c index 27c5429..59d5fa4 100644 --- a/src/mesa/drivers/dri/i965/intel_tex_image.c +++ b/src/mesa/drivers/dri/i965/intel_tex_image.c @@ -518,6 +518,13 @@ intel_gettexsubimage_tiled_memcpy(struct gl_context *ctx, return false; } + /* tiled_to_linear() assumes that if the object is swizzled, it + * is using I915_BIT6_SWIZZLE_9_10 for X and I915_BIT6_SWIZZLE_9 for Y. + * This is only true on gen5 and above. + */ + if (brw->gen < 5 && brw->has_swizzling) + return false; + /* Since we are going to write raw data to the miptree, we need to resolve * any pending fast color clears before we start. */ diff --git a/src/mesa/drivers/dri/i965/intel_tex_subimage.c b/src/mesa/drivers/dri/i965/intel_tex_subimage.c index 40569e1..7acb3d3 100644 --- a/src/mesa/drivers/dri/i965/intel_tex_subimage.c +++ b/src/mesa/drivers/dri/i965/intel_tex_subimage.c @@ -134,6 +134,13 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx, return false; } + /* tiled_to_linear() assumes that if the object is swizzled, it + * is using I915_BIT6_SWIZZLE_9_10 for X and I915_BIT6_SWIZZLE_9 for Y. + * This is only true on gen5 and above. + */ + if (brw->gen < 5 && brw->has_swizzling) + return false; + /* Since we are going to write raw data to the miptree, we need to resolve * any pending fast color clears before we start. */ -- 2.10.2 _______________________________________________ mesa-dev mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-dev
