From: Nicolai Hähnle <[email protected]>
Prepare for dumping CS descriptor list.
---
src/gallium/drivers/radeonsi/si_debug.c | 37 +++++++++++++++++++--------------
1 file changed, 21 insertions(+), 16 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_debug.c
b/src/gallium/drivers/radeonsi/si_debug.c
index b9e912d..2e727f6 100644
--- a/src/gallium/drivers/radeonsi/si_debug.c
+++ b/src/gallium/drivers/radeonsi/si_debug.c
@@ -433,56 +433,61 @@ static void si_dump_descriptor_list(struct si_descriptors
*desc,
COLOR_RESET "\n");
}
fprintf(f, "\n");
gpu_list += desc->element_dw_size;
cpu_list += desc->element_dw_size;
}
}
static void si_dump_descriptors(struct si_context *sctx,
- struct si_shader_ctx_state *state,
- FILE *f)
+ enum pipe_shader_type processor,
+ const struct tgsi_shader_info *info, FILE *f)
{
- if (!state->cso || !state->current)
- return;
-
- unsigned type = state->cso->type;
- const struct tgsi_shader_info *info = &state->cso->info;
struct si_descriptors *descs =
&sctx->descriptors[SI_DESCS_FIRST_SHADER +
- type * SI_NUM_SHADER_DESCS];
+ processor * SI_NUM_SHADER_DESCS];
static const char *shader_name[] = {"VS", "PS", "GS", "TCS", "TES",
"CS"};
static const char *elem_name[] = {
" - Constant buffer",
" - Shader buffer",
" - Sampler",
" - Image",
};
unsigned num_elements[] = {
util_last_bit(info->const_buffers_declared),
util_last_bit(info->shader_buffers_declared),
util_last_bit(info->samplers_declared),
util_last_bit(info->images_declared),
};
- if (type == PIPE_SHADER_VERTEX) {
- si_dump_descriptor_list(&sctx->vertex_buffers,
shader_name[type],
+ if (processor == PIPE_SHADER_VERTEX) {
+ si_dump_descriptor_list(&sctx->vertex_buffers,
shader_name[processor],
" - Vertex buffer", info->num_inputs,
f);
}
for (unsigned i = 0; i < SI_NUM_SHADER_DESCS; ++i, ++descs)
- si_dump_descriptor_list(descs, shader_name[type], elem_name[i],
+ si_dump_descriptor_list(descs, shader_name[processor],
elem_name[i],
num_elements[i], f);
}
+static void si_dump_gfx_descriptors(struct si_context *sctx,
+ const struct si_shader_ctx_state *state,
+ FILE *f)
+{
+ if (!state->cso || !state->current)
+ return;
+
+ si_dump_descriptors(sctx, state->cso->type, &state->cso->info, f);
+}
+
struct si_shader_inst {
char text[160]; /* one disasm line */
unsigned offset; /* instruction offset */
unsigned size; /* instruction size = 4 or 8 */
};
/* Split a disassembly string into lines and add them to the array pointed
* to by "instructions". */
static void si_add_split_disasm(const char *disasm,
uint64_t start_addr,
@@ -766,25 +771,25 @@ static void si_dump_debug_state(struct pipe_context *ctx,
FILE *f,
si_dump_gfx_shader(sctx->screen, &sctx->ps_shader, f);
if (flags & PIPE_DUMP_DEVICE_STATUS_REGISTERS) {
si_dump_annotated_shaders(sctx, f);
si_dump_command("Active waves (raw data)", "umr -wa |
column -t", f);
si_dump_command("Wave information", "umr -O bits -wa",
f);
}
si_dump_descriptor_list(&sctx->descriptors[SI_DESCS_RW_BUFFERS],
"", "RW buffers", SI_NUM_RW_BUFFERS, f);
- si_dump_descriptors(sctx, &sctx->vs_shader, f);
- si_dump_descriptors(sctx, &sctx->tcs_shader, f);
- si_dump_descriptors(sctx, &sctx->tes_shader, f);
- si_dump_descriptors(sctx, &sctx->gs_shader, f);
- si_dump_descriptors(sctx, &sctx->ps_shader, f);
+ si_dump_gfx_descriptors(sctx, &sctx->vs_shader, f);
+ si_dump_gfx_descriptors(sctx, &sctx->tcs_shader, f);
+ si_dump_gfx_descriptors(sctx, &sctx->tes_shader, f);
+ si_dump_gfx_descriptors(sctx, &sctx->gs_shader, f);
+ si_dump_gfx_descriptors(sctx, &sctx->ps_shader, f);
}
if (flags & PIPE_DUMP_LAST_COMMAND_BUFFER) {
si_dump_bo_list(sctx, &sctx->last_gfx, f);
si_dump_last_ib(sctx, f);
fprintf(f, "Done.\n");
/* dump only once */
radeon_clear_saved_cs(&sctx->last_gfx);
--
2.9.3
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