From: Marek Olšák <[email protected]>
even vec_type is f32.
---
src/gallium/drivers/radeonsi/si_shader.c | 28 ++++++++++------------
.../drivers/radeonsi/si_shader_tgsi_setup.c | 16 ++++++-------
2 files changed, 21 insertions(+), 23 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index a5d370b..0200172 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -3306,21 +3306,21 @@ static LLVMValueRef image_fetch_coords(
struct gallivm_state *gallivm = bld_base->base.gallivm;
LLVMBuilderRef builder = gallivm->builder;
unsigned target = inst->Memory.Texture;
unsigned num_coords = tgsi_util_get_texture_coord_dim(target);
LLVMValueRef coords[4];
LLVMValueRef tmp;
int chan;
for (chan = 0; chan < num_coords; ++chan) {
tmp = lp_build_emit_fetch(bld_base, inst, src, chan);
- tmp = LLVMBuildBitCast(builder, tmp,
bld_base->uint_bld.elem_type, "");
+ tmp = LLVMBuildBitCast(builder, tmp, ctx->i32, "");
coords[chan] = tmp;
}
/* 1D textures are allocated and used as 2D on GFX9. */
if (ctx->screen->b.chip_class >= GFX9) {
if (target == TGSI_TEXTURE_1D) {
coords[1] = ctx->i32_0;
num_coords++;
} else if (target == TGSI_TEXTURE_1D_ARRAY) {
coords[2] = coords[1];
@@ -3414,31 +3414,31 @@ static void buffer_append_args(
static void load_fetch_args(
struct lp_build_tgsi_context * bld_base,
struct lp_build_emit_data * emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
struct gallivm_state *gallivm = bld_base->base.gallivm;
const struct tgsi_full_instruction * inst = emit_data->inst;
unsigned target = inst->Memory.Texture;
LLVMValueRef rsrc;
- emit_data->dst_type = LLVMVectorType(bld_base->base.elem_type, 4);
+ emit_data->dst_type = ctx->v4f32;
if (inst->Src[0].Register.File == TGSI_FILE_BUFFER) {
LLVMBuilderRef builder = gallivm->builder;
LLVMValueRef offset;
LLVMValueRef tmp;
rsrc = shader_buffer_fetch_rsrc(ctx, &inst->Src[0]);
tmp = lp_build_emit_fetch(bld_base, inst, 1, 0);
- offset = LLVMBuildBitCast(builder, tmp,
bld_base->uint_bld.elem_type, "");
+ offset = LLVMBuildBitCast(builder, tmp, ctx->i32, "");
buffer_append_args(ctx, emit_data, rsrc, ctx->i32_0,
offset, false, false);
} else if (inst->Src[0].Register.File == TGSI_FILE_IMAGE) {
LLVMValueRef coords;
image_fetch_rsrc(bld_base, &inst->Src[0], false, target, &rsrc);
coords = image_fetch_coords(bld_base, inst, 1);
if (target == TGSI_TEXTURE_BUFFER) {
@@ -3522,32 +3522,31 @@ static LLVMValueRef get_memory_ptr(struct
si_shader_context *ctx,
ptr = LLVMBuildBitCast(builder, ptr, LLVMPointerType(type, addr_space),
"");
return ptr;
}
static void load_emit_memory(
struct si_shader_context *ctx,
struct lp_build_emit_data *emit_data)
{
const struct tgsi_full_instruction *inst = emit_data->inst;
- struct lp_build_context *base = &ctx->bld_base.base;
struct gallivm_state *gallivm = &ctx->gallivm;
LLVMBuilderRef builder = gallivm->builder;
unsigned writemask = inst->Dst[0].Register.WriteMask;
LLVMValueRef channels[4], ptr, derived_ptr, index;
int chan;
- ptr = get_memory_ptr(ctx, inst, base->elem_type, 1);
+ ptr = get_memory_ptr(ctx, inst, ctx->f32, 1);
for (chan = 0; chan < 4; ++chan) {
if (!(writemask & (1 << chan))) {
- channels[chan] = LLVMGetUndef(base->elem_type);
+ channels[chan] = LLVMGetUndef(ctx->f32);
continue;
}
index = LLVMConstInt(ctx->i32, chan, 0);
derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
channels[chan] = LLVMBuildLoad(builder, derived_ptr, "");
}
emit_data->output[emit_data->chan] = lp_build_gather_values(gallivm,
channels, 4);
}
@@ -3692,21 +3691,21 @@ static void store_fetch_args(
memory = tgsi_full_src_register_from_dst(&inst->Dst[0]);
if (inst->Dst[0].Register.File == TGSI_FILE_BUFFER) {
LLVMValueRef offset;
LLVMValueRef tmp;
rsrc = shader_buffer_fetch_rsrc(ctx, &memory);
tmp = lp_build_emit_fetch(bld_base, inst, 0, 0);
- offset = LLVMBuildBitCast(builder, tmp,
bld_base->uint_bld.elem_type, "");
+ offset = LLVMBuildBitCast(builder, tmp, ctx->i32, "");
buffer_append_args(ctx, emit_data, rsrc, ctx->i32_0,
offset, false, false);
} else if (inst->Dst[0].Register.File == TGSI_FILE_IMAGE) {
unsigned target = inst->Memory.Texture;
LLVMValueRef coords;
/* 8bit/16bit TC L1 write corruption bug on SI.
* All store opcodes not aligned to a dword are affected.
*
@@ -3805,27 +3804,26 @@ static void store_emit_buffer(
get_store_intr_attribs(writeonly_memory));
}
}
static void store_emit_memory(
struct si_shader_context *ctx,
struct lp_build_emit_data *emit_data)
{
const struct tgsi_full_instruction *inst = emit_data->inst;
struct gallivm_state *gallivm = &ctx->gallivm;
- struct lp_build_context *base = &ctx->bld_base.base;
LLVMBuilderRef builder = gallivm->builder;
unsigned writemask = inst->Dst[0].Register.WriteMask;
LLVMValueRef ptr, derived_ptr, data, index;
int chan;
- ptr = get_memory_ptr(ctx, inst, base->elem_type, 0);
+ ptr = get_memory_ptr(ctx, inst, ctx->f32, 0);
for (chan = 0; chan < 4; ++chan) {
if (!(writemask & (1 << chan))) {
continue;
}
data = lp_build_emit_fetch(&ctx->bld_base, inst, 1, chan);
index = LLVMConstInt(ctx->i32, chan, 0);
derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
LLVMBuildStore(builder, data, derived_ptr);
}
@@ -3890,44 +3888,44 @@ static void atomic_fetch_args(
struct lp_build_emit_data * emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
struct gallivm_state *gallivm = bld_base->base.gallivm;
LLVMBuilderRef builder = gallivm->builder;
const struct tgsi_full_instruction * inst = emit_data->inst;
LLVMValueRef data1, data2;
LLVMValueRef rsrc;
LLVMValueRef tmp;
- emit_data->dst_type = bld_base->base.elem_type;
+ emit_data->dst_type = ctx->f32;
tmp = lp_build_emit_fetch(bld_base, inst, 2, 0);
- data1 = LLVMBuildBitCast(builder, tmp, bld_base->uint_bld.elem_type,
"");
+ data1 = LLVMBuildBitCast(builder, tmp, ctx->i32, "");
if (inst->Instruction.Opcode == TGSI_OPCODE_ATOMCAS) {
tmp = lp_build_emit_fetch(bld_base, inst, 3, 0);
- data2 = LLVMBuildBitCast(builder, tmp,
bld_base->uint_bld.elem_type, "");
+ data2 = LLVMBuildBitCast(builder, tmp, ctx->i32, "");
}
/* llvm.amdgcn.image/buffer.atomic.cmpswap reflect the hardware order
* of arguments, which is reversed relative to TGSI (and GLSL)
*/
if (inst->Instruction.Opcode == TGSI_OPCODE_ATOMCAS)
emit_data->args[emit_data->arg_count++] = data2;
emit_data->args[emit_data->arg_count++] = data1;
if (inst->Src[0].Register.File == TGSI_FILE_BUFFER) {
LLVMValueRef offset;
rsrc = shader_buffer_fetch_rsrc(ctx, &inst->Src[0]);
tmp = lp_build_emit_fetch(bld_base, inst, 1, 0);
- offset = LLVMBuildBitCast(builder, tmp,
bld_base->uint_bld.elem_type, "");
+ offset = LLVMBuildBitCast(builder, tmp, ctx->i32, "");
buffer_append_args(ctx, emit_data, rsrc, ctx->i32_0,
offset, true, false);
} else if (inst->Src[0].Register.File == TGSI_FILE_IMAGE) {
unsigned target = inst->Memory.Texture;
LLVMValueRef coords;
image_fetch_rsrc(bld_base, &inst->Src[0], true, target, &rsrc);
coords = image_fetch_coords(bld_base, inst, 1);
@@ -4042,24 +4040,24 @@ static void atomic_emit(
else
coords = emit_data->args[1];
ac_build_type_name_for_intr(LLVMTypeOf(coords), coords_type,
sizeof(coords_type));
snprintf(intrinsic_name, sizeof(intrinsic_name),
"llvm.amdgcn.image.atomic.%s.%s",
action->intr_name, coords_type);
}
tmp = lp_build_intrinsic(
- builder, intrinsic_name, bld_base->uint_bld.elem_type,
+ builder, intrinsic_name, ctx->i32,
emit_data->args, emit_data->arg_count, 0);
emit_data->output[emit_data->chan] =
- LLVMBuildBitCast(builder, tmp, bld_base->base.elem_type, "");
+ LLVMBuildBitCast(builder, tmp, ctx->f32, "");
}
static void set_tex_fetch_args(struct si_shader_context *ctx,
struct lp_build_emit_data *emit_data,
unsigned target,
LLVMValueRef res_ptr, LLVMValueRef samp_ptr,
LLVMValueRef *param, unsigned count,
unsigned dmask)
{
struct gallivm_state *gallivm = &ctx->gallivm;
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
index 3442a4b..341c18d 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
@@ -680,21 +680,21 @@ LLVMValueRef si_llvm_emit_fetch(struct
lp_build_tgsi_context *bld_base,
if (reg->Register.Indirect) {
LLVMValueRef load = load_value_from_array(bld_base,
reg->Register.File, type,
swizzle, reg->Register.Index, ®->Indirect);
return bitcast(bld_base, type, load);
}
switch(reg->Register.File) {
case TGSI_FILE_IMMEDIATE: {
LLVMTypeRef ctype = tgsi2llvmtype(bld_base, type);
if (tgsi_type_is_64bit(type)) {
- result =
LLVMGetUndef(LLVMVectorType(LLVMIntTypeInContext(bld_base->base.gallivm->context,
32), bld_base->base.type.length * 2));
+ result = LLVMGetUndef(LLVMVectorType(ctx->i32,
bld_base->base.type.length * 2));
result = LLVMConstInsertElement(result,
ctx->imms[reg->Register.Index * TGSI_NUM_CHANNELS + swizzle],
ctx->i32_0);
result = LLVMConstInsertElement(result,
ctx->imms[reg->Register.Index * TGSI_NUM_CHANNELS + swizzle + 1],
ctx->i32_1);
return LLVMConstBitCast(result, ctype);
} else {
return LLVMConstBitCast(ctx->imms[reg->Register.Index *
TGSI_NUM_CHANNELS + swizzle], ctype);
}
@@ -780,21 +780,21 @@ static void emit_declaration(struct lp_build_tgsi_context
*bld_base,
unsigned first, last, i;
switch(decl->Declaration.File) {
case TGSI_FILE_ADDRESS:
{
unsigned idx;
for (idx = decl->Range.First; idx <= decl->Range.Last; idx++) {
unsigned chan;
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
ctx->addrs[idx][chan] = lp_build_alloca_undef(
&ctx->gallivm,
- ctx->bld_base.uint_bld.elem_type, "");
+ ctx->i32, "");
}
}
break;
}
case TGSI_FILE_TEMPORARY:
{
char name[16] = "";
LLVMValueRef array_alloca = NULL;
unsigned decl_size;
@@ -829,58 +829,58 @@ static void emit_declaration(struct lp_build_tgsi_context
*bld_base,
* FIXME: We shouldn't need to have the non-alloca
* code path for arrays. LLVM should be smart enough to
* promote allocas into registers when profitable.
*
* LLVM 3.8 crashes with this.
*/
if ((HAVE_LLVM >= 0x0309 && array_size > 16) ||
/* TODO: VGPR indexing is buggy on GFX9. */
ctx->screen->b.chip_class == GFX9) {
array_alloca = LLVMBuildAlloca(builder,
- LLVMArrayType(bld_base->base.vec_type,
+ LLVMArrayType(ctx->f32,
array_size), "array");
ctx->temp_array_allocas[id] = array_alloca;
}
}
if (!ctx->temps_count) {
ctx->temps_count =
bld_base->info->file_max[TGSI_FILE_TEMPORARY] + 1;
ctx->temps = MALLOC(TGSI_NUM_CHANNELS *
ctx->temps_count * sizeof(LLVMValueRef));
}
if (!array_alloca) {
for (i = 0; i < decl_size; ++i) {
#ifdef DEBUG
snprintf(name, sizeof(name), "TEMP%d.%c",
first + i / 4, "xyzw"[i % 4]);
#endif
ctx->temps[first * TGSI_NUM_CHANNELS + i] =
lp_build_alloca_undef(bld_base->base.gallivm,
-
bld_base->base.vec_type,
+ ctx->f32,
name);
}
} else {
LLVMValueRef idxs[2] = {
ctx->i32_0,
NULL
};
unsigned j = 0;
if (writemask != TGSI_WRITEMASK_XYZW &&
!ctx->undef_alloca) {
/* Create a dummy alloca. We use it so that we
* have a pointer that is safe to load from if
* a shader ever reads from a channel that
* it never writes to.
*/
ctx->undef_alloca = lp_build_alloca_undef(
bld_base->base.gallivm,
- bld_base->base.vec_type, "undef");
+ ctx->f32, "undef");
}
for (i = 0; i < decl_size; ++i) {
LLVMValueRef ptr;
if (writemask & (1 << (i % 4))) {
#ifdef DEBUG
snprintf(name, sizeof(name),
"TEMP%d.%c",
first + i / 4, "xyzw"[i % 4]);
#endif
idxs[1] = LLVMConstInt(ctx->i32, j, 0);
@@ -932,21 +932,21 @@ static void emit_declaration(struct lp_build_tgsi_context
*bld_base,
assert(idx < RADEON_LLVM_MAX_OUTPUTS);
if (ctx->outputs[idx][0])
continue;
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
#ifdef DEBUG
snprintf(name, sizeof(name), "OUT%d.%c",
idx, "xyzw"[chan % 4]);
#endif
ctx->outputs[idx][chan] = lp_build_alloca_undef(
&ctx->gallivm,
- ctx->bld_base.base.elem_type, name);
+ ctx->f32, name);
}
}
break;
}
case TGSI_FILE_MEMORY:
ctx->declare_memory_region(ctx, decl);
break;
default:
@@ -1025,21 +1025,21 @@ void si_llvm_emit_store(struct lp_build_tgsi_context
*bld_base,
break;
}
default:
return;
}
if (!tgsi_type_is_64bit(dtype))
LLVMBuildStore(builder, value, temp_ptr);
else {
LLVMValueRef ptr = LLVMBuildBitCast(builder,
value,
-
LLVMVectorType(LLVMIntTypeInContext(bld_base->base.gallivm->context, 32), 2),
"");
+
LLVMVectorType(ctx->i32, 2), "");
LLVMValueRef val2;
value = LLVMBuildExtractElement(builder, ptr,
ctx->i32_0, "");
val2 = LLVMBuildExtractElement(builder, ptr,
ctx->i32_1, "");
LLVMBuildStore(builder, bitcast(bld_base,
TGSI_TYPE_FLOAT, value), temp_ptr);
LLVMBuildStore(builder, bitcast(bld_base,
TGSI_TYPE_FLOAT, val2), temp_ptr2);
}
}
@@ -1222,21 +1222,21 @@ static void uif_emit(const struct lp_build_tgsi_action
*action,
}
static void emit_immediate(struct lp_build_tgsi_context *bld_base,
const struct tgsi_full_immediate *imm)
{
unsigned i;
struct si_shader_context *ctx = si_shader_context(bld_base);
for (i = 0; i < 4; ++i) {
ctx->imms[ctx->imms_num * TGSI_NUM_CHANNELS + i] =
- LLVMConstInt(bld_base->uint_bld.elem_type,
imm->u[i].Uint, false );
+ LLVMConstInt(ctx->i32, imm->u[i].Uint, false
);
}
ctx->imms_num++;
}
void si_llvm_context_init(struct si_shader_context *ctx,
struct si_screen *sscreen,
struct si_shader *shader,
LLVMTargetMachineRef tm,
const struct tgsi_shader_info *info,
--
2.7.4
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