For the series: Reviewed-by: Marek Olšák <[email protected]>
Marek On Fri, Mar 31, 2017 at 10:03 AM, Nicolai Hähnle <[email protected]> wrote: > From: Nicolai Hähnle <[email protected]> > > Fix a bug that was caused by a type mismatch in the shfit count between > GLSL and TGSI. I briefly considered adjusting the TGSI semantics, but > since both LLVM and AMD GCN require both arguments to be of the same type, > it makes more sense to keep TGSI as-is -- it reflects the underlying > implementation better. > > I'm also sending out piglit tests that expose this error. > > v2: use the right number of components for the temporary register > --- > There are vector-by-vector shifts, so a full vec4 may be needed, but > let's do without when we can. > --- > src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 20 +++++++++++++++----- > 1 file changed, 15 insertions(+), 5 deletions(-) > > diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp > b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp > index 369dff7..7da08da 100644 > --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp > +++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp > @@ -2095,27 +2095,37 @@ glsl_to_tgsi_visitor::visit_expression(ir_expression* > ir, st_src_reg *op) > if (native_integers) { > emit_asm(ir, TGSI_OPCODE_NOT, result_dst, op[0]); > break; > } > case ir_unop_u2f: > if (native_integers) { > emit_asm(ir, TGSI_OPCODE_U2F, result_dst, op[0]); > break; > } > case ir_binop_lshift: > - if (native_integers) { > - emit_asm(ir, TGSI_OPCODE_SHL, result_dst, op[0], op[1]); > - break; > - } > case ir_binop_rshift: > if (native_integers) { > - emit_asm(ir, TGSI_OPCODE_ISHR, result_dst, op[0], op[1]); > + unsigned opcode = ir->operation == ir_binop_lshift ? TGSI_OPCODE_SHL > + : > TGSI_OPCODE_ISHR; > + st_src_reg count; > + > + if (glsl_base_type_is_64bit(op[0].type)) { > + /* GLSL shift operations have 32-bit shift counts, but TGSI uses > + * 64 bits. > + */ > + count = > get_temp(glsl_type::u64vec(ir->operands[1]->type->components())); > + emit_asm(ir, TGSI_OPCODE_U2I64, st_dst_reg(count), op[1]); > + } else { > + count = op[1]; > + } > + > + emit_asm(ir, opcode, result_dst, op[0], count); > break; > } > case ir_binop_bit_and: > if (native_integers) { > emit_asm(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]); > break; > } > case ir_binop_bit_xor: > if (native_integers) { > emit_asm(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]); > -- > 2.9.3 > > _______________________________________________ > mesa-dev mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/mesa-dev _______________________________________________ mesa-dev mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-dev
