From: Dave Airlie <[email protected]> If we had no rasterization, we'd emit SPI color format as all 0's the hw dislikes this, add the workaround from radeonsi.
Found while debugging tessellation Signed-off-by: Dave Airlie <[email protected]> --- src/amd/vulkan/radv_cmd_buffer.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index d13becf..527184f 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -757,7 +757,24 @@ radv_emit_fragment_shader(struct radv_cmd_buffer *cmd_buffer, ps->info.fs.writes_z ? V_028710_SPI_SHADER_32_R : V_028710_SPI_SHADER_ZERO); - radeon_set_context_reg(cmd_buffer->cs, R_028714_SPI_SHADER_COL_FORMAT, blend->spi_shader_col_format); + /* Ensure that some export memory is always allocated, for two reasons: + * + * 1) Correctness: The hardware ignores the EXEC mask if no export + * memory is allocated, so KILL and alpha test do not work correctly + * without this. + * 2) Performance: Every shader needs at least a NULL export, even when + * it writes no color/depth output. The NULL export instruction + * stalls without this setting. + * + * Don't add this to CB_SHADER_MASK. + */ + unsigned spi_shader_col_format = blend->spi_shader_col_format; + if (!spi_shader_col_format && + !ps->info.fs.writes_z && + !ps->info.fs.writes_stencil && + !ps->info.fs.writes_sample_mask) + spi_shader_col_format = V_028714_SPI_SHADER_32_R; + radeon_set_context_reg(cmd_buffer->cs, R_028714_SPI_SHADER_COL_FORMAT, spi_shader_col_format); radeon_set_context_reg(cmd_buffer->cs, R_028238_CB_TARGET_MASK, blend->cb_target_mask); radeon_set_context_reg(cmd_buffer->cs, R_02823C_CB_SHADER_MASK, blend->cb_shader_mask); -- 2.9.3 _______________________________________________ mesa-dev mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-dev
