From: Nicolai Hähnle <[email protected]>
This allows the next patches to be simple while still being able
to make use of SDMA even in some unusual cases.
---
src/gallium/drivers/radeonsi/si_cp_dma.c | 43 ++++++++++++++++----------------
1 file changed, 21 insertions(+), 22 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c
b/src/gallium/drivers/radeonsi/si_cp_dma.c
index 1be7586..b40f5cc 100644
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -216,49 +216,48 @@ static void si_clear_buffer(struct pipe_context *ctx,
struct pipe_resource *dst,
(size > 128 * 1024 ||
/* Buffers not used by the GFX IB yet will be cleared by SDMA.
* This happens to move most buffer clears to SDMA, including
* DCC and CMASK clears, because pipe->clear clears them before
* si_emit_framebuffer_state (in a draw call) adds them.
* For example, DeusEx:MD has 21 buffer clears per frame and all
* of them are moved to SDMA thanks to this. */
!ws->cs_is_buffer_referenced(sctx->b.gfx.cs, rdst->buf,
RADEON_USAGE_READWRITE))) {
sctx->b.dma_clear_buffer(ctx, dst, offset, size, value);
- return;
- }
-
- uint64_t va = rdst->gpu_address + offset;
+ } else {
+ uint64_t va = rdst->gpu_address + offset;
- /* Flush the caches. */
- sctx->b.flags |= SI_CONTEXT_PS_PARTIAL_FLUSH |
- SI_CONTEXT_CS_PARTIAL_FLUSH | flush_flags;
+ /* Flush the caches. */
+ sctx->b.flags |= SI_CONTEXT_PS_PARTIAL_FLUSH |
+ SI_CONTEXT_CS_PARTIAL_FLUSH | flush_flags;
- while (size) {
- unsigned byte_count = MIN2(size, CP_DMA_MAX_BYTE_COUNT);
- unsigned dma_flags = tc_l2_flag | CP_DMA_CLEAR;
+ while (size) {
+ unsigned byte_count = MIN2(size, CP_DMA_MAX_BYTE_COUNT);
+ unsigned dma_flags = tc_l2_flag | CP_DMA_CLEAR;
- si_cp_dma_prepare(sctx, dst, NULL, byte_count, size, 0,
- &is_first, &dma_flags);
+ si_cp_dma_prepare(sctx, dst, NULL, byte_count, size, 0,
+ &is_first, &dma_flags);
- /* Emit the clear packet. */
- si_emit_cp_dma(sctx, va, value, byte_count, dma_flags, coher);
+ /* Emit the clear packet. */
+ si_emit_cp_dma(sctx, va, value, byte_count, dma_flags,
coher);
- size -= byte_count;
- va += byte_count;
- }
+ size -= byte_count;
+ va += byte_count;
+ }
- if (tc_l2_flag)
- rdst->TC_L2_dirty = true;
+ if (tc_l2_flag)
+ rdst->TC_L2_dirty = true;
- /* If it's not a framebuffer fast clear... */
- if (coher == R600_COHERENCY_SHADER)
- sctx->b.num_cp_dma_calls++;
+ /* If it's not a framebuffer fast clear... */
+ if (coher == R600_COHERENCY_SHADER)
+ sctx->b.num_cp_dma_calls++;
+ }
}
/**
* Realign the CP DMA engine. This must be done after a copy with an unaligned
* size.
*
* \param size Remaining size to the CP DMA alignment.
*/
static void si_cp_dma_realign_engine(struct si_context *sctx, unsigned size,
unsigned user_flags, bool *is_first)
--
2.9.3
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