> On Mar 16, 2017, at 20:02, Dave Airlie <[email protected]> wrote: > > From: Dave Airlie <[email protected]> > > SPIR-V defines the f32->f16 operation as flushing denormals to 0, > this compares the class using amd class opcode. > > Thanks to Matt Arsenault for figuring it out. > > This fixes: > dEQP-VK.spirv_assembly.instruction.compute.opquantize.flush_to_zero > > Signed-off-by: Dave Airlie <[email protected]> > --- > src/amd/common/ac_nir_to_llvm.c | 9 ++++++++- > src/amd/common/sid.h | 13 +++++++++++++ > 2 files changed, 21 insertions(+), 1 deletion(-) > > diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c > index 77e3a85..ac80677 100644 > --- a/src/amd/common/ac_nir_to_llvm.c > +++ b/src/amd/common/ac_nir_to_llvm.c > @@ -1027,11 +1027,18 @@ static LLVMValueRef emit_f2f16(struct > nir_to_llvm_context *ctx, > { > LLVMValueRef result; > LLVMValueRef cond; > + LLVMValueRef args[2]; > src0 = to_float(ctx, src0); > result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, ""); > - result = ac_build_intrinsic(&ctx->ac, "llvm.canonicalize.f16", > ctx->f16, &result, 1, AC_FUNC_ATTR_READNONE); > + LLVMValueRef mask = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, > false); > +
I don’t think you need the canonicalize here. This will also only work on VI+ which supports f16 instructions -Matt _______________________________________________ mesa-dev mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-dev
