This series is, Reviewed-by: Edward O'Callaghan <[email protected]>
On 02/16/2017 02:48 PM, Dave Airlie wrote: > From: Dave Airlie <[email protected]> > > We want to use a different intrinsic on newer llvm, so move this > code to a shared area. > > Signed-off-by: Dave Airlie <[email protected]> > --- > src/amd/common/ac_llvm_build.c | 24 ++++++++++++++++++++++++ > src/amd/common/ac_llvm_build.h | 4 ++++ > 2 files changed, 28 insertions(+) > > diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c > index 20216a7..180fd24 100644 > --- a/src/amd/common/ac_llvm_build.c > +++ b/src/amd/common/ac_llvm_build.c > @@ -763,3 +763,27 @@ ac_emit_sendmsg(struct ac_llvm_context *ctx, > ac_emit_llvm_intrinsic(ctx, intr_name, ctx->voidt, > args, 2, 0); > } > + > +LLVMValueRef > +ac_emit_imsb(struct ac_llvm_context *ctx, > + LLVMValueRef arg, > + LLVMTypeRef dst_type) > +{ > + LLVMValueRef msb = ac_emit_llvm_intrinsic(ctx, "llvm.AMDGPU.flbit.i32", > + dst_type, &arg, 1, > + AC_FUNC_ATTR_READNONE); > + > + /* The HW returns the last bit index from MSB, but NIR/TGSI wants > + * the index from LSB. Invert it by doing "31 - msb". */ > + msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false), > + msb, ""); > + > + LLVMValueRef all_ones = LLVMConstInt(ctx->i32, -1, true); > + LLVMValueRef cond = LLVMBuildOr(ctx->builder, > + LLVMBuildICmp(ctx->builder, LLVMIntEQ, > + arg, > LLVMConstInt(ctx->i32, 0, 0), ""), > + LLVMBuildICmp(ctx->builder, LLVMIntEQ, > + arg, all_ones, ""), ""); > + > + return LLVMBuildSelect(ctx->builder, cond, all_ones, msb, ""); > +} > diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h > index e88874a..0ff04e4 100644 > --- a/src/amd/common/ac_llvm_build.h > +++ b/src/amd/common/ac_llvm_build.h > @@ -182,6 +182,10 @@ void ac_emit_sendmsg(struct ac_llvm_context *ctx, > uint32_t msg, > LLVMValueRef wave_id); > > +LLVMValueRef ac_emit_imsb(struct ac_llvm_context *ctx, > + LLVMValueRef arg, > + LLVMTypeRef dst_type); > + > #ifdef __cplusplus > } > #endif >
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