This will allow us to later detach shader_info from nir_shader.
---
src/amd/vulkan/radv_pipeline.c | 21 +++++++++++++++-----
src/compiler/spirv/nir_spirv.h | 3 ++-
src/compiler/spirv/spirv2nir.c | 7 ++++++-
src/compiler/spirv/spirv_to_nir.c | 4 ++--
src/intel/vulkan/anv_pipeline.c | 42 +++++++++++++++++++++++++--------------
5 files changed, 53 insertions(+), 24 deletions(-)
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index d92fbf8..4e45643 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -153,6 +153,7 @@ radv_shader_compile_to_nir(struct radv_device *device,
const char *entrypoint_name,
gl_shader_stage stage,
const VkSpecializationInfo *spec_info,
+ shader_info **sh_info,
bool dump)
{
if (strcmp(entrypoint_name, "main") != 0) {
@@ -191,9 +192,13 @@ radv_shader_compile_to_nir(struct radv_device *device,
}
}
+ *sh_info = calloc(1, sizeof(struct shader_info));
+ if (!*sh_info)
+ return NULL;
+
entry_point = spirv_to_nir(spirv, module->size / 4,
spec_entries, num_spec_entries,
- stage, entrypoint_name,
&nir_options);
+ stage, entrypoint_name,
&nir_options, *sh_info);
nir = entry_point->shader;
assert(nir->stage == stage);
nir_validate_shader(nir);
@@ -384,16 +389,22 @@ radv_pipeline_compile(struct radv_pipeline *pipeline,
return variant;
}
+ shader_info *sh_info = NULL;
nir = radv_shader_compile_to_nir(pipeline->device,
module, entrypoint, stage,
- spec_info, dump);
- if (nir == NULL)
+ spec_info, &sh_info, dump);
+ if (nir == NULL) {
+ if (sh_info)
+ free(sh_info);
return NULL;
+ }
variant = radv_shader_variant_create(pipeline->device, nir, layout, key,
&code, &code_size, dump);
- if (!module->nir)
- ralloc_free(nir);
+ if (!module->nir) {
+ ralloc_free(nir);
+ free(sh_info);
+ }
if (variant && cache)
variant = radv_pipeline_cache_insert_shader(cache, sha1,
variant,
diff --git a/src/compiler/spirv/nir_spirv.h b/src/compiler/spirv/nir_spirv.h
index 500f2cb..577833b 100644
--- a/src/compiler/spirv/nir_spirv.h
+++ b/src/compiler/spirv/nir_spirv.h
@@ -45,7 +45,8 @@ nir_function *spirv_to_nir(const uint32_t *words, size_t
word_count,
struct nir_spirv_specialization *specializations,
unsigned num_specializations,
gl_shader_stage stage, const char *entry_point_name,
- const nir_shader_compiler_options *options);
+ const nir_shader_compiler_options *options,
+ shader_info *sh_info);
#ifdef __cplusplus
}
diff --git a/src/compiler/spirv/spirv2nir.c b/src/compiler/spirv/spirv2nir.c
index 3dc0735..0f83157 100644
--- a/src/compiler/spirv/spirv2nir.c
+++ b/src/compiler/spirv/spirv2nir.c
@@ -72,9 +72,14 @@ int main(int argc, char **argv)
return 1;
}
+ shader_info *sh_info = rzalloc(NULL, shader_info);
+
nir_function *func = spirv_to_nir(map, word_count, NULL, 0,
- MESA_SHADER_FRAGMENT, "main", NULL);
+ MESA_SHADER_FRAGMENT, "main", NULL,
+ sh_info);
nir_print_shader(func->shader, stderr);
+ ralloc_free(sh_info);
+
return 0;
}
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index 9c5d331..34727e1 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -2962,7 +2962,7 @@ nir_function *
spirv_to_nir(const uint32_t *words, size_t word_count,
struct nir_spirv_specialization *spec, unsigned num_spec,
gl_shader_stage stage, const char *entry_point_name,
- const nir_shader_compiler_options *options)
+ const nir_shader_compiler_options *options, shader_info *sh_info)
{
const uint32_t *word_end = words + word_count;
@@ -2995,7 +2995,7 @@ spirv_to_nir(const uint32_t *words, size_t word_count,
return NULL;
}
- b->shader = nir_shader_create(NULL, stage, options, NULL);
+ b->shader = nir_shader_create(NULL, stage, options, sh_info);
/* Set shader info defaults */
b->shader->info->gs.invocations = 1;
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 0aac711..ccd75da 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -88,7 +88,8 @@ anv_shader_compile_to_nir(struct anv_device *device,
struct anv_shader_module *module,
const char *entrypoint_name,
gl_shader_stage stage,
- const VkSpecializationInfo *spec_info)
+ const VkSpecializationInfo *spec_info,
+ shader_info *sh_info)
{
if (strcmp(entrypoint_name, "main") != 0) {
anv_finishme("Multiple shaders per module not really supported");
@@ -121,7 +122,7 @@ anv_shader_compile_to_nir(struct anv_device *device,
nir_function *entry_point =
spirv_to_nir(spirv, module->size / 4,
spec_entries, num_spec_entries,
- stage, entrypoint_name, nir_options);
+ stage, entrypoint_name, nir_options, sh_info);
nir_shader *nir = entry_point->shader;
assert(nir->stage == stage);
nir_validate_shader(nir);
@@ -301,12 +302,13 @@ anv_pipeline_compile(struct anv_pipeline *pipeline,
const char *entrypoint,
gl_shader_stage stage,
const VkSpecializationInfo *spec_info,
+ shader_info *sh_info,
struct brw_stage_prog_data *prog_data,
struct anv_pipeline_bind_map *map)
{
nir_shader *nir = anv_shader_compile_to_nir(pipeline->device,
module, entrypoint, stage,
- spec_info);
+ spec_info, sh_info);
if (nir == NULL)
return NULL;
@@ -446,16 +448,19 @@ anv_pipeline_compile_vs(struct anv_pipeline *pipeline,
.sampler_to_descriptor = sampler_to_descriptor
};
+ void *mem_ctx = ralloc_context(NULL);
+
+ shader_info *sh_info = rzalloc(mem_ctx, shader_info);
+
nir_shader *nir = anv_pipeline_compile(pipeline, module, entrypoint,
MESA_SHADER_VERTEX, spec_info,
- &prog_data.base.base, &map);
+ sh_info, &prog_data.base.base,
+ &map);
if (nir == NULL)
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
anv_fill_binding_table(&prog_data.base.base, 0);
- void *mem_ctx = ralloc_context(NULL);
-
ralloc_steal(mem_ctx, nir);
prog_data.inputs_read = nir->info->inputs_read;
@@ -534,16 +539,19 @@ anv_pipeline_compile_gs(struct anv_pipeline *pipeline,
.sampler_to_descriptor = sampler_to_descriptor
};
+ void *mem_ctx = ralloc_context(NULL);
+
+ shader_info *sh_info = rzalloc(mem_ctx, shader_info);
+
nir_shader *nir = anv_pipeline_compile(pipeline, module, entrypoint,
MESA_SHADER_GEOMETRY, spec_info,
- &prog_data.base.base, &map);
+ sh_info, &prog_data.base.base,
+ &map);
if (nir == NULL)
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
anv_fill_binding_table(&prog_data.base.base, 0);
- void *mem_ctx = ralloc_context(NULL);
-
ralloc_steal(mem_ctx, nir);
brw_compute_vue_map(&pipeline->device->info,
@@ -612,9 +620,13 @@ anv_pipeline_compile_fs(struct anv_pipeline *pipeline,
.sampler_to_descriptor = sampler_to_descriptor
};
+ void *mem_ctx = ralloc_context(NULL);
+
+ shader_info *sh_info = rzalloc(mem_ctx, shader_info);
+
nir_shader *nir = anv_pipeline_compile(pipeline, module, entrypoint,
MESA_SHADER_FRAGMENT, spec_info,
- &prog_data.base, &map);
+ sh_info, &prog_data.base, &map);
if (nir == NULL)
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
@@ -671,8 +683,6 @@ anv_pipeline_compile_fs(struct anv_pipeline *pipeline,
anv_fill_binding_table(&prog_data.base, num_rts);
- void *mem_ctx = ralloc_context(NULL);
-
ralloc_steal(mem_ctx, nir);
unsigned code_size;
@@ -735,16 +745,18 @@ anv_pipeline_compile_cs(struct anv_pipeline *pipeline,
.sampler_to_descriptor = sampler_to_descriptor
};
+ void *mem_ctx = ralloc_context(NULL);
+
+ shader_info *sh_info = rzalloc(mem_ctx, shader_info);
+
nir_shader *nir = anv_pipeline_compile(pipeline, module, entrypoint,
MESA_SHADER_COMPUTE, spec_info,
- &prog_data.base, &map);
+ sh_info, &prog_data.base, &map);
if (nir == NULL)
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
anv_fill_binding_table(&prog_data.base, 1);
- void *mem_ctx = ralloc_context(NULL);
-
ralloc_steal(mem_ctx, nir);
unsigned code_size;
--
2.7.4
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