Signed-off-by: Anuj Phogat <[email protected]>
---
src/intel/vulkan/gen7_pipeline.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c
index 9411631..bafee28 100644
--- a/src/intel/vulkan/gen7_pipeline.c
+++ b/src/intel/vulkan/gen7_pipeline.c
@@ -243,6 +243,9 @@ genX(graphics_pipeline_create)(
/* Haswell requires the sample mask to be set in this packet as well
as
* in 3DSTATE_SAMPLE_MASK; the values should match. */
/* _NEW_BUFFERS, _NEW_MULTISAMPLE */
+#if GEN_IS_HASWELL
+ ps.SampleMask = 0xff;
+#endif
}
uint32_t samples = pCreateInfo->pMultisampleState ?
--
2.5.5
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