Am 09.06.2016 um 02:48 schrieb Dave Airlie: > From: Dave Airlie <[email protected]> > > This just adds the basic support for 64-bit opcodes, > and the new types. > > Signed-off-by: Dave Airlie <[email protected]> > --- > src/gallium/auxiliary/tgsi/tgsi_info.c | 54 > ++++++++++++++++++++++++++++++ > src/gallium/auxiliary/tgsi/tgsi_info.h | 4 ++- > src/gallium/include/pipe/p_shader_tokens.h | 28 +++++++++++++++- > 3 files changed, 84 insertions(+), 2 deletions(-) > > diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c > b/src/gallium/auxiliary/tgsi/tgsi_info.c > index 60e0f2c..f33d057 100644 > --- a/src/gallium/auxiliary/tgsi/tgsi_info.c > +++ b/src/gallium/auxiliary/tgsi/tgsi_info.c > @@ -265,6 +265,28 @@ static const struct tgsi_opcode_info > opcode_info[TGSI_OPCODE_LAST] = > { 1, 1, 0, 0, 0, 0, 0, COMP, "VOTE_ANY", TGSI_OPCODE_VOTE_ANY }, > { 1, 1, 0, 0, 0, 0, 0, COMP, "VOTE_ALL", TGSI_OPCODE_VOTE_ALL }, > { 1, 1, 0, 0, 0, 0, 0, COMP, "VOTE_EQ", TGSI_OPCODE_VOTE_EQ }, > + { 1, 2, 0, 0, 0, 0, 0, COMP, "U64SEQ", TGSI_OPCODE_U64SEQ }, > + { 1, 2, 0, 0, 0, 0, 0, COMP, "U64SNE", TGSI_OPCODE_U64SNE }, > + { 1, 2, 0, 0, 0, 0, 0, COMP, "I64SLT", TGSI_OPCODE_I64SLT }, > + { 1, 2, 0, 0, 0, 0, 0, COMP, "U64SLT", TGSI_OPCODE_U64SLT }, > + { 1, 2, 0, 0, 0, 0, 0, COMP, "I64SGE", TGSI_OPCODE_I64SGE }, > + { 1, 2, 0, 0, 0, 0, 0, COMP, "U64SGE", TGSI_OPCODE_U64SGE }, > + { 1, 2, 0, 0, 0, 0, 0, COMP, "I64MIN", TGSI_OPCODE_I64MIN }, > + { 1, 2, 0, 0, 0, 0, 0, COMP, "U64MIN", TGSI_OPCODE_U64MIN }, > + { 1, 2, 0, 0, 0, 0, 0, COMP, "I64MAX", TGSI_OPCODE_I64MAX }, > + { 1, 2, 0, 0, 0, 0, 0, COMP, "U64MAX", TGSI_OPCODE_U64MAX }, > + { 1, 1, 0, 0, 0, 0, 0, COMP, "I64ABS", TGSI_OPCODE_I64ABS }, > + { 1, 1, 0, 0, 0, 0, 0, COMP, "I64SSG", TGSI_OPCODE_I64SSG }, > + { 1, 1, 0, 0, 0, 0, 0, COMP, "I64NEG", TGSI_OPCODE_I64NEG }, > + { 1, 2, 0, 0, 0, 0, 0, COMP, "U64ADD", TGSI_OPCODE_U64ADD }, > + { 1, 2, 0, 0, 0, 0, 0, COMP, "U64MUL", TGSI_OPCODE_U64MUL }, > + { 1, 2, 0, 0, 0, 0, 0, COMP, "U64SHL", TGSI_OPCODE_U64SHL }, > + { 1, 2, 0, 0, 0, 0, 0, COMP, "I64SHR", TGSI_OPCODE_I64SHR }, > + { 1, 2, 0, 0, 0, 0, 0, COMP, "U64SHR", TGSI_OPCODE_U64SHR }, > + { 1, 2, 0, 0, 0, 0, 0, COMP, "I64DIV", TGSI_OPCODE_I64DIV }, > + { 1, 2, 0, 0, 0, 0, 0, COMP, "U64DIV", TGSI_OPCODE_U64DIV }, > + { 1, 2, 0, 0, 0, 0, 0, COMP, "I64MOD", TGSI_OPCODE_I64MOD }, > + { 1, 2, 0, 0, 0, 0, 0, COMP, "U64MOD", TGSI_OPCODE_U64MOD }, > }; > > const struct tgsi_opcode_info * > @@ -382,6 +404,12 @@ tgsi_opcode_infer_type( uint opcode ) > case TGSI_OPCODE_DSGE: > case TGSI_OPCODE_DSLT: > case TGSI_OPCODE_DSNE: > + case TGSI_OPCODE_U64SEQ: > + case TGSI_OPCODE_U64SNE: > + case TGSI_OPCODE_U64SLT: > + case TGSI_OPCODE_U64SGE: > + case TGSI_OPCODE_I64SLT: > + case TGSI_OPCODE_I64SGE: > return TGSI_TYPE_SIGNED; > case TGSI_OPCODE_DADD: > case TGSI_OPCODE_DABS: > @@ -406,6 +434,24 @@ tgsi_opcode_infer_type( uint opcode ) > case TGSI_OPCODE_I2D: > case TGSI_OPCODE_U2D: > return TGSI_TYPE_DOUBLE; > + case TGSI_OPCODE_U64MAX: > + case TGSI_OPCODE_U64MIN: > + case TGSI_OPCODE_U64ADD: > + case TGSI_OPCODE_U64MUL: > + case TGSI_OPCODE_U64DIV: > + case TGSI_OPCODE_U64MOD: > + case TGSI_OPCODE_U64SHL: > + case TGSI_OPCODE_U64SHR: > + return TGSI_TYPE_UNSIGNED64; > + case TGSI_OPCODE_I64MAX: > + case TGSI_OPCODE_I64MIN: > + case TGSI_OPCODE_I64ABS: > + case TGSI_OPCODE_I64SSG: > + case TGSI_OPCODE_I64NEG: > + case TGSI_OPCODE_I64SHR: > + case TGSI_OPCODE_I64DIV: > + case TGSI_OPCODE_I64MOD: > + return TGSI_TYPE_SIGNED64; > default: > return TGSI_TYPE_FLOAT; > } > @@ -455,6 +501,14 @@ tgsi_opcode_infer_src_type( uint opcode ) > case TGSI_OPCODE_DSLT: > case TGSI_OPCODE_DSNE: > return TGSI_TYPE_DOUBLE; > + case TGSI_OPCODE_U64SEQ: > + case TGSI_OPCODE_U64SNE: > + case TGSI_OPCODE_U64SLT: > + case TGSI_OPCODE_U64SGE: > + return TGSI_TYPE_UNSIGNED64; > + case TGSI_OPCODE_I64SLT: > + case TGSI_OPCODE_I64SGE: > + return TGSI_TYPE_SIGNED64; > default: > return tgsi_opcode_infer_type(opcode); > } > diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.h > b/src/gallium/auxiliary/tgsi/tgsi_info.h > index 46f03cd..2eaa09a 100644 > --- a/src/gallium/auxiliary/tgsi/tgsi_info.h > +++ b/src/gallium/auxiliary/tgsi/tgsi_info.h > @@ -98,7 +98,9 @@ enum tgsi_opcode_type { > TGSI_TYPE_UNSIGNED, > TGSI_TYPE_SIGNED, > TGSI_TYPE_FLOAT, > - TGSI_TYPE_DOUBLE > + TGSI_TYPE_DOUBLE, > + TGSI_TYPE_UNSIGNED64, > + TGSI_TYPE_SIGNED64, > }; > > enum tgsi_opcode_type > diff --git a/src/gallium/include/pipe/p_shader_tokens.h > b/src/gallium/include/pipe/p_shader_tokens.h > index abf26d3..37ce771 100644 > --- a/src/gallium/include/pipe/p_shader_tokens.h > +++ b/src/gallium/include/pipe/p_shader_tokens.h > @@ -566,7 +566,33 @@ struct tgsi_property_data { > #define TGSI_OPCODE_VOTE_ALL 224 > #define TGSI_OPCODE_VOTE_EQ 225 > > -#define TGSI_OPCODE_LAST 226 > +#define TGSI_OPCODE_U64SEQ 226 > +#define TGSI_OPCODE_U64SNE 227 > +#define TGSI_OPCODE_I64SLT 228 > +#define TGSI_OPCODE_U64SLT 229 > +#define TGSI_OPCODE_I64SGE 230 > +#define TGSI_OPCODE_U64SGE 231 > + > +#define TGSI_OPCODE_I64MIN 232 > +#define TGSI_OPCODE_U64MIN 233 > +#define TGSI_OPCODE_I64MAX 234 > +#define TGSI_OPCODE_U64MAX 235 > + > +#define TGSI_OPCODE_I64ABS 236 > +#define TGSI_OPCODE_I64SSG 237 > +#define TGSI_OPCODE_I64NEG 238 > + > +#define TGSI_OPCODE_U64ADD 239 > +#define TGSI_OPCODE_U64MUL 240 > +#define TGSI_OPCODE_U64SHL 241 > +#define TGSI_OPCODE_I64SHR 242 > +#define TGSI_OPCODE_U64SHR 243 > + > +#define TGSI_OPCODE_I64DIV 244 > +#define TGSI_OPCODE_U64DIV 245 > +#define TGSI_OPCODE_I64MOD 246 > +#define TGSI_OPCODE_U64MOD 247 > +#define TGSI_OPCODE_LAST 248 > > /** > * Opcode is the operation code to execute. A given operation defines the >
As you mentioned, these need docs. As for the conversions, I think we'd need most of them here too. Probably don't need conversions to bool, and some are fully redundant (e.g. unsigned 32bit -> signed/unsigned 64bit). If there's no particular overflow behavior required (didn't see that in the spec on a very quick glance) probably some more are not strictly necessary. FWIW if you implement them you need to do something about running out of opcodes (limited to 8bit). I suppose you could just make the Opcode field in tgsi_instruction 9 bits and decrease the NumSrcRegs bits from 4 to 3 (or remove the last padding bit, albeit I don't think we'd ever require more than 7 src regs so can as well nuke that bit there). (That should definitely be in a separate patch.) Or try to fill the remaining opcode gaps (there's 14 of them) or find some more instructions to nuke - you could theoretically fill all of the required instructions in using the gaps but it's probably not a good idea. Roland _______________________________________________ mesa-dev mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-dev
