On 06/03/2016 10:29 AM, Samuel Pitoiset wrote:
This doesn't seem crazy, but it will require testing I would say.
Especially, arb_shader_image_load_store-host-mem-barrier which makes use
of different barriers with images.
I have just tested on GK106, no regression with that test. But I will
make an other test on GF119 later today.
On 06/03/2016 08:25 AM, Ilia Mirkin wrote:
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: "12.0" <[email protected]>
---
src/gallium/drivers/nouveau/nvc0/nvc0_context.c | 25
++++++++++++++++---------
1 file changed, 16 insertions(+), 9 deletions(-)
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.c
b/src/gallium/drivers/nouveau/nvc0/nvc0_context.c
index 98e787a..1137e6c 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.c
@@ -90,17 +90,24 @@ nvc0_memory_barrier(struct pipe_context *pipe,
unsigned flags)
nvc0->cb_dirty = true;
}
}
+ } else {
+ /* Pretty much any writing by shaders needs a serialize after
+ * it. Especially when moving between 3d and compute pipelines,
but even
+ * without that.
+ */
+ IMMED_NVC0(push, NVC0_3D(SERIALIZE), 0);
}
- if (flags & (PIPE_BARRIER_SHADER_BUFFER |
- PIPE_BARRIER_CONSTANT_BUFFER |
- PIPE_BARRIER_INDEX_BUFFER |
- PIPE_BARRIER_IMAGE |
- PIPE_BARRIER_TEXTURE |
- PIPE_BARRIER_VERTEX_BUFFER |
- PIPE_BARRIER_STREAMOUT_BUFFER)) {
- IMMED_NVC0(push, NVC0_3D(MEM_BARRIER), 0x1011);
- }
+ /* If we're going to texture from a buffer/image written by a
shader, we
+ * must flush the texture cache.
+ */
+ if (flags & PIPE_BARRIER_TEXTURE)
+ IMMED_NVC0(push, NVC0_3D(TEX_CACHE_CTL), 0);
+
+ if (flags & PIPE_BARRIER_CONSTANT_BUFFER)
+ nvc0->cb_dirty = true;
+ if (flags & (PIPE_BARRIER_VERTEX_BUFFER | PIPE_BARRIER_INDEX_BUFFER))
+ nvc0->base.vbo_dirty = true;
}
static void
--
-Samuel
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