On 04/28/2016 01:40 PM, Antia Puentes wrote:
> From: "Juan A. Suarez Romero" <[email protected]>
>
> Even when the number of vertex attributes is under the limit, for
> shaders that use a high number of them, we can quickly exhaust the
> number of hardware registers.
Were you able to construct a case where this actually occurs? Limits
exposed by the driver and enforced by the GLSL linker should prevent this.
> In this case, just abort the linking.
> ---
> src/mesa/drivers/dri/i965/brw_fs.cpp | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
> b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index 4b8835d..387a266 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -1857,6 +1857,12 @@ fs_visitor::convert_attr_sources_to_hw_regs(fs_inst
> *inst)
> inst->src[i].nr +
> inst->src[i].reg_offset;
>
> + if (grf >= 128) {
> + fail("Failure to register allocate. Reduce the number of "
> + "vertex input attributes to avoid this.");
> + return;
> + }
> +
> unsigned exec_size;
> /* As explained at brw_reg_from_fs_reg, From the Haswell PRM:
> *
>
_______________________________________________
mesa-dev mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
