v2 (Ben): Use combination of msaa_layout and number of samples
instead of introducing explicit type for lossless
compression (intel_miptree_is_lossless_compressed()).
v3 (Ben): Do not set fast claer state in surface state setup.
Moved into brw_postdraw_set_buffers_need_resolve()
using a separate patch.
v4: Support for blorp
Signed-off-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
---
src/mesa/drivers/dri/i965/brw_defines.h | 1 +
src/mesa/drivers/dri/i965/gen8_blorp.cpp | 5 ++++-
src/mesa/drivers/dri/i965/gen8_surface_state.c | 3 +++
3 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
b/src/mesa/drivers/dri/i965/brw_defines.h
index 60b696c..3193d32 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -656,6 +656,7 @@
#define GEN8_SURFACE_AUX_MODE_MCS 1
#define GEN8_SURFACE_AUX_MODE_APPEND 2
#define GEN8_SURFACE_AUX_MODE_HIZ 3
+#define GEN9_SURFACE_AUX_MODE_CCS_E 5
/* Surface state DW7 */
#define GEN9_SURFACE_RT_COMPRESSION_SHIFT 30
diff --git a/src/mesa/drivers/dri/i965/gen8_blorp.cpp
b/src/mesa/drivers/dri/i965/gen8_blorp.cpp
index bbf724c..acab52d 100644
--- a/src/mesa/drivers/dri/i965/gen8_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen8_blorp.cpp
@@ -74,10 +74,13 @@ gen8_blorp_emit_surface_state(struct brw_context *brw,
surface->msaa_layout);
if (surface->mt->mcs_mt) {
+ const uint32_t aux_mode =
+ intel_miptree_is_lossless_compressed(brw, mt) ?
+ GEN9_SURFACE_AUX_MODE_CCS_E : GEN8_SURFACE_AUX_MODE_MCS;
surf[6] = SET_FIELD(surface->mt->qpitch / 4, GEN8_SURFACE_AUX_QPITCH) |
SET_FIELD((surface->mt->mcs_mt->pitch / 128) - 1,
GEN8_SURFACE_AUX_PITCH) |
- GEN8_SURFACE_AUX_MODE_MCS;
+ aux_mode;
} else {
surf[6] = 0;
}
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c
b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index 5161d2b..e3593d3 100644
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
@@ -217,6 +217,9 @@ gen8_get_aux_mode(const struct brw_context *brw,
if (brw->gen >= 9 || mt->num_samples == 1)
assert(mt->halign == 16);
+ if (intel_miptree_is_lossless_compressed(brw, mt))
+ return GEN9_SURFACE_AUX_MODE_CCS_E;
+
return GEN8_SURFACE_AUX_MODE_MCS;
}
--
2.5.5
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