On Saturday, April 16, 2016 4:42:46 PM PDT Topi Pohjolainen wrote: > Signed-off-by: Topi Pohjolainen <[email protected]> > --- > src/mesa/drivers/dri/i965/brw_blorp.cpp | 6 +++++- > src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 8 +++++--- > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 3 +-- > 3 files changed, 11 insertions(+), 6 deletions(-) > > diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/ i965/brw_blorp.cpp > index b567b42..8c69f6f 100644 > --- a/src/mesa/drivers/dri/i965/brw_blorp.cpp > +++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp > @@ -210,7 +210,7 @@ void > brw_blorp_exec(struct brw_context *brw, const brw_blorp_params *params) > { > struct gl_context *ctx = &brw->ctx; > - uint32_t estimated_max_batch_usage = 1500; > + const uint32_t estimated_max_batch_usage = brw->gen >= 8 ? 1800 : 1500;
May as well just make it 1800 all the time...I think these numbers are
pretty bogus anyway.
> bool check_aperture_failed_once = false;
>
> /* Flush the sampler and render caches. We definitely need to flush the
> @@ -236,6 +236,10 @@ retry:
> case 7:
> gen7_blorp_exec(brw, params);
> break;
> + case 8:
> + case 9:
> + gen8_blorp_exec(brw, params);
> + break;
> default:
> /* BLORP is not supported before Gen6. */
> unreachable("not reached");
> diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/
drivers/dri/i965/brw_blorp_blit.cpp
> index e055513..006075c 100644
> --- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
> @@ -252,8 +252,8 @@ brw_blorp_copytexsubimage(struct brw_context *brw,
> src_mt->num_samples > 8 || dst_mt->num_samples > 8)
> return false;
>
> - /* BLORP is only supported for Gen6-7. */
> - if (brw->gen < 6 || brw->gen > 7)
> + /* BLORP is only supported from Gen6 onwards. */
> + if (brw->gen < 6)
> return false;
>
> if (_mesa_get_format_base_format(src_rb->Format) !=
> @@ -354,7 +354,7 @@ brw_blorp_framebuffer(struct brw_context *brw,
> GLbitfield mask, GLenum filter)
> {
> /* BLORP is not supported before Gen6. */
> - if (brw->gen < 6 || brw->gen >= 8)
> + if (brw->gen < 6)
> return mask;
>
> /* There is support only for four and eight samples. */
> @@ -1660,6 +1660,8 @@ brw_blorp_blit_program::texel_fetch(struct brw_reg
dst)
> texture_lookup(dst, SHADER_OPCODE_TXF, gen6_args, s_is_zero ? 2 : 5);
> break;
> case 7:
> + case 8:
> + case 9:
Seems like this ought to go in a different patch?
> switch (key->tex_layout) {
> case INTEL_MSAA_LAYOUT_IMS:
> /* From the Ivy Bridge PRM, Vol4 Part1 p72 (Multisampled Surface
Storage
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/
drivers/dri/i965/intel_mipmap_tree.c
> index 9f754e7..f69d629 100644
> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> @@ -2165,8 +2165,7 @@ intel_miptree_updownsample(struct brw_context *brw,
> struct intel_mipmap_tree *dst)
> {
> /* There is support only for four and eight samples. */
> - const bool use_blorp = brw->gen < 8 &&
> - src->num_samples != 2 && dst->num_samples != 2 &&
> + const bool use_blorp = src->num_samples != 2 && dst->num_samples != 2 &&
> src->num_samples <= 8 && dst->num_samples <= 8;
>
> if (use_blorp) {
>
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