This patchset allows nir to support shared variable. It works well with our SPIR-V support in the Intel Vulkan driver.
I've also tried to get GLSL to delay shared variable lowering to allow it to be handled later in nir, but I got caught up in various places within the GLSL compiler. Oh well... giving up for now since the other path works fine, and the Intel Vulkan driver needs this. Jordan Justen (9): nir/print: Add space after shader_storage var mode nir: Add compute shader shared variable storage class squash: Increase nir_variable_data::mode to 5 bits nir: Add atomic operations on variables nir: Add support for lowering load/stores of shared variables nir: Lower shared var atomics during nir_lower_io i965/nir: Lower nir compute shader shared variables nir/glsl_to_nir: Initialize num_shared i965: Use num_shared from nir_shader for shared variables size src/compiler/nir/glsl_to_nir.cpp | 8 ++- src/compiler/nir/nir.c | 7 ++ src/compiler/nir/nir.h | 8 ++- src/compiler/nir/nir_clone.c | 2 + src/compiler/nir/nir_intrinsics.h | 27 ++++++++ src/compiler/nir/nir_lower_atomics.c | 3 +- src/compiler/nir/nir_lower_io.c | 121 ++++++++++++++++++++++++++++++++--- src/compiler/nir/nir_print.c | 8 ++- src/compiler/nir/nir_sweep.c | 1 + src/compiler/nir/nir_validate.c | 5 ++ src/mesa/drivers/dri/i965/brw_cs.c | 6 +- src/mesa/drivers/dri/i965/brw_fs.cpp | 1 + src/mesa/drivers/dri/i965/brw_nir.c | 8 +++ src/mesa/drivers/dri/i965/brw_nir.h | 1 + 14 files changed, 188 insertions(+), 18 deletions(-) -- 2.7.0 _______________________________________________ mesa-dev mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-dev
