Though there is a lot of overlap with has_side_effects(), these do mean
different things.
---
src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | 6 ++----
src/mesa/drivers/dri/i965/brw_shader.cpp | 12 +++++++++++-
src/mesa/drivers/dri/i965/brw_shader.h | 2 ++
3 files changed, 15 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
index 98fa5e3..67b713b 100644
--- a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
+++ b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
@@ -917,9 +917,7 @@ fs_instruction_scheduler::calculate_deps()
foreach_in_list(schedule_node, n, &instructions) {
fs_inst *inst = (fs_inst *)n->inst;
- if (inst->opcode == FS_OPCODE_PLACEHOLDER_HALT ||
- inst->is_control_flow() ||
- inst->has_side_effects())
+ if (inst->is_scheduling_barrier() || inst->is_control_flow())
add_barrier_deps(n);
/* read-after-write deps. */
@@ -1152,7 +1150,7 @@ vec4_instruction_scheduler::calculate_deps()
foreach_in_list(schedule_node, n, &instructions) {
vec4_instruction *inst = (vec4_instruction *)n->inst;
- if (inst->is_control_flow() || inst->has_side_effects())
+ if (inst->is_scheduling_barrier() || inst->is_control_flow())
add_barrier_deps(n);
/* read-after-write deps. */
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
b/src/mesa/drivers/dri/i965/brw_shader.cpp
index d007ed0..80673e5 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -879,7 +879,7 @@ backend_instruction::writes_accumulator_implicitly(const
struct brw_device_info
}
bool
-backend_instruction::has_side_effects() const
+backend_instruction::is_scheduling_barrier() const
{
switch (opcode) {
case SHADER_OPCODE_UNTYPED_ATOMIC:
@@ -896,6 +896,7 @@ backend_instruction::has_side_effects() const
case SHADER_OPCODE_URB_WRITE_SIMD8_PER_SLOT:
case SHADER_OPCODE_URB_WRITE_SIMD8_MASKED:
case SHADER_OPCODE_URB_WRITE_SIMD8_MASKED_PER_SLOT:
+ case FS_OPCODE_PLACEHOLDER_HALT:
case FS_OPCODE_FB_WRITE:
case SHADER_OPCODE_BARRIER:
case TCS_OPCODE_URB_WRITE:
@@ -907,6 +908,15 @@ backend_instruction::has_side_effects() const
}
bool
+backend_instruction::has_side_effects() const
+{
+ switch (opcode) {
+ default:
+ return is_scheduling_barrier();
+ }
+}
+
+bool
backend_instruction::is_volatile() const
{
switch (opcode) {
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h
b/src/mesa/drivers/dri/i965/brw_shader.h
index 82374a4..0ec2a84 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -124,6 +124,8 @@ struct backend_instruction : public exec_node {
*/
bool has_side_effects() const;
+ bool is_scheduling_barrier() const;
+
/**
* True if the instruction might be affected by side effects of other
* instructions.
--
2.4.10
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