Module: Mesa Branch: master Commit: e51b0664e03a028961e1a4250c49fbc3005b2fa4 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e51b0664e03a028961e1a4250c49fbc3005b2fa4
Author: Kenneth Graunke <[email protected]> Date: Wed Feb 28 13:22:22 2018 -0800 i965: Don't emit MOVs with undefined registers for Gen4 point clipping. Gen4 point clipping calls brw_clip_tri_alloc_regs with nr_verts == 0, which means that c->reg.vertex[] isn't initialized. It then emits MOVs to stomp components of those uninitialized registers to 0. This started causing assertions after Matt's recent series, when those uninitialized registers started getting BRW_REGISTER_TYPE_NF, which definitely doesn't exist on Gen4-5. Reviewed-by: Matt Turner <[email protected]> --- src/intel/compiler/brw_clip_tri.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/compiler/brw_clip_tri.c b/src/intel/compiler/brw_clip_tri.c index 8ccf9e49b2..194e6ab1d2 100644 --- a/src/intel/compiler/brw_clip_tri.c +++ b/src/intel/compiler/brw_clip_tri.c @@ -68,7 +68,7 @@ void brw_clip_tri_alloc_regs( struct brw_clip_compile *c, i += c->nr_regs; } - if (c->vue_map.num_slots % 2) { + if (c->vue_map.num_slots % 2 && nr_verts > 0) { /* The VUE has an odd number of slots so the last register is only half * used. Fill the second half with zero. */ _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
