Module: Mesa Branch: master Commit: f9cd6c502e1eea27f4a7904dfd75a6a0a23cb41b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f9cd6c502e1eea27f4a7904dfd75a6a0a23cb41b
Author: Marek Olšák <[email protected]> Date: Wed Dec 13 00:40:19 2017 +0100 radeonsi: don't use fast color clear for small images even on APUs Increase the limit and handle non-square images better. This makes glxgears 20% faster on APUs, and a little more on dGPUs. We all use and love glxgears. Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> --- src/gallium/drivers/radeonsi/si_clear.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_clear.c b/src/gallium/drivers/radeonsi/si_clear.c index 0ac83f446b..464b9d7ac5 100644 --- a/src/gallium/drivers/radeonsi/si_clear.c +++ b/src/gallium/drivers/radeonsi/si_clear.c @@ -425,12 +425,11 @@ static void si_do_fast_color_clear(struct si_context *sctx, * the eliminate pass can be higher than the benefit of fast * clear. The closed driver does this, but the numbers may differ. * - * Always use fast clear on APUs. + * This helps on both dGPUs and APUs, even small APUs like Mullins. */ - bool too_small = sctx->screen->info.has_dedicated_vram && - tex->resource.b.b.nr_samples <= 1 && - tex->resource.b.b.width0 <= 256 && - tex->resource.b.b.height0 <= 256; + bool too_small = tex->resource.b.b.nr_samples <= 1 && + tex->resource.b.b.width0 * + tex->resource.b.b.height0 <= 512 * 512; /* Try to clear DCC first, otherwise try CMASK. */ if (vi_dcc_enabled(tex, 0)) { _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
