Module: Mesa Branch: master Commit: fd3fc5f5479410ffc87852c7d3a391e3ec548009 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fd3fc5f5479410ffc87852c7d3a391e3ec548009
Author: Kenneth Graunke <[email protected]> Date: Wed Dec 13 09:45:49 2017 -0800 i965: Don't allocate an MCS for 16x MSAA and width > 8192. The hardware doesn't support this, and isl_surf_get_mcs_surf will fail. I feel a bit bad replicating this logic, but we want to decide up front. This fixes the following test when run with --deqp-surface-width=16384: - GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_error_blitframebuffer_multisampled_framebuffers_different_sample_count Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index c1a4ce184f..ead0c359c0 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -73,6 +73,10 @@ intel_miptree_supports_mcs(struct brw_context *brw, if (devinfo->gen < 7) return false; + /* See isl_surf_get_mcs_surf for details. */ + if (mt->surf.samples == 16 && mt->surf.logical_level0_px.width > 8192) + return false; + /* In Gen7, IMS layout is only used for depth and stencil buffers. */ switch (_mesa_get_format_base_format(mt->format)) { case GL_DEPTH_COMPONENT: _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
