Module: Mesa Branch: master Commit: 2082c32950a9e3a4debc00b0d6da85404b923920 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2082c32950a9e3a4debc00b0d6da85404b923920
Author: Matt Turner <[email protected]> Date: Fri Aug 25 15:52:27 2017 -0700 i965/fs: Don't apply POW/FDIV workaround on Gen10+ The documentation says it applies only to Gens 8 and 9. Reviewed-by: Scott D Phillips <[email protected]> --- src/intel/compiler/brw_fs_generator.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp index 6489cc0d38..2622a91917 100644 --- a/src/intel/compiler/brw_fs_generator.cpp +++ b/src/intel/compiler/brw_fs_generator.cpp @@ -1639,6 +1639,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width) * and empirically this affects CHV as well. */ if (devinfo->gen >= 8 && + devinfo->gen <= 9 && p->nr_insn > 1 && brw_inst_opcode(devinfo, brw_last_inst) == BRW_OPCODE_MATH && brw_inst_math_function(devinfo, brw_last_inst) == BRW_MATH_FUNCTION_POW && _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
