Module: Mesa Branch: master Commit: a62fe340981b56fe54e49d3a6791e568f7f87554 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a62fe340981b56fe54e49d3a6791e568f7f87554
Author: Kenneth Graunke <[email protected]> Date: Sun Sep 24 12:23:34 2017 -0700 i965/vec4: Actually handle atomic op intrinsics. Embarassingly, someone enabled the ARB_shader_atomic_counter_ops extension for Gen7+ but never added the intrinsics to the switch statement in the vec4 backend, so they just hit an unreachable() call and died. Fixes: 40dd45d0c6aa4a9d (i965: Enable ARB_shader_atomic_counter_ops) Cc: "17.2 17.1 17.0 13.0" <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Ian Romanick <[email protected]> --- src/intel/compiler/brw_vec4_nir.cpp | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/src/intel/compiler/brw_vec4_nir.cpp b/src/intel/compiler/brw_vec4_nir.cpp index 211682916f..0a1caa9fad 100644 --- a/src/intel/compiler/brw_vec4_nir.cpp +++ b/src/intel/compiler/brw_vec4_nir.cpp @@ -804,9 +804,17 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr) break; } - case nir_intrinsic_atomic_counter_read: case nir_intrinsic_atomic_counter_inc: - case nir_intrinsic_atomic_counter_dec: { + case nir_intrinsic_atomic_counter_dec: + case nir_intrinsic_atomic_counter_read: + case nir_intrinsic_atomic_counter_add: + case nir_intrinsic_atomic_counter_min: + case nir_intrinsic_atomic_counter_max: + case nir_intrinsic_atomic_counter_and: + case nir_intrinsic_atomic_counter_or: + case nir_intrinsic_atomic_counter_xor: + case nir_intrinsic_atomic_counter_exchange: + case nir_intrinsic_atomic_counter_comp_swap: { unsigned surf_index = prog_data->base.binding_table.abo_start + (unsigned) instr->const_index[0]; const vec4_builder bld = _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
