Module: Mesa Branch: master Commit: 5b1b088f2a176973b66e0765b4127c7882a12860 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5b1b088f2a176973b66e0765b4127c7882a12860
Author: Samuel Iglesias Gonsálvez <[email protected]> Date: Tue Aug 29 06:56:26 2017 +0200 nir/spirv: fix chain access with different index bit sizes Currently we support 32-bit indexes/offsets all over the driver, so we convert them to that bit size. Fixes dEQP-VK.spirv_assembly.instruction.*.indexing.* v2: Use u2u32 instead (Jason). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> --- src/compiler/spirv/vtn_variables.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/src/compiler/spirv/vtn_variables.c b/src/compiler/spirv/vtn_variables.c index e03547c8d5..997b66f542 100644 --- a/src/compiler/spirv/vtn_variables.c +++ b/src/compiler/spirv/vtn_variables.c @@ -102,10 +102,15 @@ vtn_access_link_as_ssa(struct vtn_builder *b, struct vtn_access_link link, if (link.mode == vtn_access_mode_literal) { return nir_imm_int(&b->nb, link.id * stride); } else if (stride == 1) { - return vtn_ssa_value(b, link.id)->def; + nir_ssa_def *ssa = vtn_ssa_value(b, link.id)->def; + if (ssa->bit_size != 32) + ssa = nir_u2u32(&b->nb, ssa); + return ssa; } else { - return nir_imul(&b->nb, vtn_ssa_value(b, link.id)->def, - nir_imm_int(&b->nb, stride)); + nir_ssa_def *src0 = vtn_ssa_value(b, link.id)->def; + if (src0->bit_size != 32) + src0 = nir_u2u32(&b->nb, src0); + return nir_imul(&b->nb, src0, nir_imm_int(&b->nb, stride)); } } _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
