Module: Mesa Branch: master Commit: 6d929d3f85604768971d04fa2548f02ffca1696e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6d929d3f85604768971d04fa2548f02ffca1696e
Author: Dave Airlie <[email protected]> Date: Mon Aug 21 21:08:10 2017 +0100 radv/gfx9: set descriptor up for base_mip to level range. This is required on GFX9, fixes a bug in Talos where all the mipmaps overlay each other. Just pushing this as well as it fixes Talos. Cc: "17.2" <[email protected]> Signed-off-by: Dave Airlie <[email protected]> --- src/amd/vulkan/radv_image.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index 06b9c2f9d3..9c5767262e 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -876,6 +876,7 @@ radv_image_view_make_descriptor(struct radv_image_view *iview, uint32_t blk_w; uint32_t *descriptor; uint32_t *fmask_descriptor; + uint32_t hw_level = 0; if (is_storage_image) { descriptor = iview->storage_descriptor; @@ -888,11 +889,13 @@ radv_image_view_make_descriptor(struct radv_image_view *iview, assert(image->surface.blk_w % vk_format_get_blockwidth(image->vk_format) == 0); blk_w = image->surface.blk_w / vk_format_get_blockwidth(image->vk_format) * vk_format_get_blockwidth(iview->vk_format); + if (device->physical_device->rad_info.chip_class >= GFX9) + hw_level = iview->base_mip; si_make_texture_descriptor(device, image, is_storage_image, iview->type, iview->vk_format, components, - 0, iview->level_count - 1, + hw_level, hw_level + iview->level_count - 1, iview->base_layer, iview->base_layer + iview->layer_count - 1, iview->extent.width, _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
