Module: Mesa Branch: main Commit: b888677dcfe0d522189d05099d9d006c9c88739b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b888677dcfe0d522189d05099d9d006c9c88739b
Author: Samuel Pitoiset <[email protected]> Date: Thu Jan 11 16:50:23 2024 +0100 radv: add vertex_robustness1 to radv_shader_stage_key Signed-off-by: Samuel Pitoiset <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27007> --- src/amd/vulkan/radv_pipeline.c | 2 +- src/amd/vulkan/radv_shader.h | 3 +-- src/amd/vulkan/radv_shader_info.c | 6 +++--- 3 files changed, 5 insertions(+), 6 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index a515f063758..8a9309ecd22 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -206,7 +206,7 @@ radv_generate_pipeline_key(const struct radv_device *device, const VkPipelineSha if (uniform_robustness >= RADV_BUFFER_ROBUSTNESS_2) key.stage_info[stage].uniform_robustness2 = 1; if (stage == MESA_SHADER_VERTEX && vertex_robustness >= RADV_BUFFER_ROBUSTNESS_1) - key.vertex_robustness1 = 1u; + key.stage_info[stage].vertex_robustness1 = 1u; } key.keep_statistic_info = radv_pipeline_capture_shader_stats(device, flags); diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h index a4be370817b..c254c442e18 100644 --- a/src/amd/vulkan/radv_shader.h +++ b/src/amd/vulkan/radv_shader.h @@ -92,6 +92,7 @@ struct radv_shader_stage_key { uint8_t storage_robustness2 : 1; uint8_t uniform_robustness2 : 1; + uint8_t vertex_robustness1 : 1; uint8_t optimisations_disabled : 1; }; @@ -125,8 +126,6 @@ struct radv_pipeline_key { uint32_t enable_remove_point_size : 1; uint32_t unknown_rast_prim : 1; - uint32_t vertex_robustness1 : 1; - uint32_t keep_statistic_info : 1; /* Pipeline shader version (up to 8) to force re-compilation when RADV_BUILD_ID_OVERRIDE is enabled. */ diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c index c32004aa5e1..7d54db7fb58 100644 --- a/src/amd/vulkan/radv_shader_info.c +++ b/src/amd/vulkan/radv_shader_info.c @@ -417,7 +417,7 @@ gather_info_input_decl_vs(const nir_shader *nir, unsigned location, const struct static void gather_shader_info_vs(struct radv_device *device, const nir_shader *nir, const struct radv_pipeline_key *pipeline_key, - struct radv_shader_info *info) + const struct radv_shader_stage_key *stage_key, struct radv_shader_info *info) { if (pipeline_key->vs.has_prolog && nir->info.inputs_read) { info->vs.has_prolog = true; @@ -425,7 +425,7 @@ gather_shader_info_vs(struct radv_device *device, const nir_shader *nir, const s } /* Use per-attribute vertex descriptors to prevent faults and for correct bounds checking. */ - info->vs.use_per_attribute_vb_descs = pipeline_key->vertex_robustness1 || info->vs.dynamic_inputs; + info->vs.use_per_attribute_vb_descs = stage_key->vertex_robustness1 || info->vs.dynamic_inputs; /* We have to ensure consistent input register assignments between the main shader and the * prolog. @@ -1211,7 +1211,7 @@ radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *n gather_shader_info_tcs(device, nir, pipeline_key, info); break; case MESA_SHADER_VERTEX: - gather_shader_info_vs(device, nir, pipeline_key, info); + gather_shader_info_vs(device, nir, pipeline_key, stage_key, info); break; case MESA_SHADER_MESH: gather_shader_info_mesh(device, nir, pipeline_key, info);
